User manual

Glossary
© National Instruments Corporation Glossary-3 VXI-MXI-2 User Manual
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backplane An assembly, typically a printed circuit board, with 96-pin
connectors and signal paths that bus the connector pins. A C-size
VXIbus system will have two sets of bused connectors called J1
and J2. A D-size VXIbus system will have three sets of bused
connectors called J1, J2, and J3.
backoff condition A method used to resolve a deadlock situation by acknowledging
one of the bus masters with either a RETRY or BERR, allowing
the data transfer from the other master to complete.
base address A specified address that is combined with a relative address to
determine the absolute address of a data location. All VXI
address windows have an associated base address for their
assigned VXI address spaces.
BERR* Bus Error signal. This signal is asserted by either a slave device
or the BTO unit when an incorrect transfer is made on the Data
Transfer Bus (DTB). The BERR* signal is also used in VXI for
certain protocol implementations such as writes to a full Signal
register and synchronization under the Fast Handshake Word
Serial Protocol.
binary A numbering system with a base of 2.
bit Binary digit. The smallest possible unit of data: a two-state,
yes/no, 0/1 alternative. The building block of binary coding and
numbering systems. Eight bits make up a byte.
block data rate Transfer rate when using MXIbus block-mode transfers.
block-mode transfer An uninterrupted transfer of data elements in which the master
sources only the first address at the beginning of the cycle. The
slave is then responsible for incrementing the address on
subsequent transfers so that the next element is transferred to or
from the proper storage location. In VME, the data transfer may
have no more than 256 elements; MXI does not have this
restriction.