User manual

Glossary

interlocked arbitration mode Contrasted with normal operating mode; an optional mode of

operation in which the system performs as one large VXIbus

mainframe with only one master of the entire system (VXIbus

and MXIbus) at any given moment. In this mode there is no

chance for a deadlock situation.

interrupt A means for a device to request service from another device.

interrupt handler A VMEbus functional module that detects interrupt requests

generated by interrupters and responds to those requests by

requesting status and identify information.

interrupter A device capable of asserting interrupts and responding to an

interrupt acknowledge cycle.

interrupt level The relative priority at which a device can interrupt.

INTX Interrupt and Timing Extension; a daughter card option that

plugs into the two daughter card connectors on the first-

generation VXI-MXI. It extendes the seven VMEbus interrupt

lines, the eight VXIbus TTL trigger lines, the VXIbus CLK10

signal, and the VMEbus utility signals SYSRESET*,

SYSFAIL*, and ACFAIL*. This functionality is built into the

VXI-MXI-2, so this daughter card is not required.

inward cycle A data transfer cycle that maps from the MXIbus to the VXIbus.

IRQ* Interrupt signal

KB Kilobytes of memory

LED Light Emitting Diode

logical address An 8-bit number that uniquely identifies each VXIbus device in

a system. It defines the A16 register address of a device, and

indicates Commander and Servant relationships.

LSB Least Significant Bit (bit 0)