User manual

Index
© National Instruments Corporation Index - 11 VXI-MXI-2 User Manual
configuration, VXI-MXI-2/B,
4-16 to 4-17
SIMM size configuration (figure),
4-16
VXI-MXI-2/B DRAM
configurations (table), 4-17
overview, 2-7
optional equipment for VXI-MXI-2,
1-5 to 1-6
OTS[3:0] bits, D-5
OUTEN bit, 5-11
P
PAREN bit, 5-63
PARERR bit, 5-29
parity checking
MXI-2, 2-6, 7-12
MXIbus, B-9
PASSED bit
description, 5-7
hard and soft resets, 5-1
performance specifications, A-5
physical specifications
B-size VXI-MXI-2, A-4
C-size VXI-MXI-2, A-4
PORT[1:0] bits
DMA Destination Configuration
Register (DCRx), 5-79
DMA Source Configuration Register
(SCRx), 5-74
POSTERR bit, 5-27
programmable configurations. See
EEPROM configuration.
PULSE bit, D-5
R
READY bit, 5-7
registers. See VXIbus A24/A32 Registers;
VXIbus Configuration Registers.
REQMEM[3:0] bits, 5-5
request level, VXI-MXI-2, 7-9
Requested Memory control, VXI-MXI-2,
7-3 to 7-4
requested memory space, VXI-MXI-2,
B-3 to B-4
requester, VMEbus, B-7
reset, hard and soft, 5-1, D-5
RESET bit
soft resets, 5-1
VXIbus Control Register (VCR), 5-9
VXIbus Status Register (VSR), 5-7
RM operation, multiframe. See multiframe
RM operation.
S
S[15:0] bits, 5-41
SA[31:0] bits, 5-75 to 5-76
SABORT bit, 5-83
SC[15:0] bits, 5-26
SCFG bit, 5-28
SERR[1:0] bits, 5-84
SET DMAIE bit, 5-68
SET DONEIE bit, 5-69
SFIE bit, 5-40
SFIN bit, 5-24
SFINH bit
VXIbus Control Register (VCR), 5-8
VXIbus Status Register (VSR), 5-7
SFINT bit, 5-38
SFOUT bit, 5-24
Shared MXIbus Status/Control Register
(SMSR/SMCR), 5-61 to 5-64
SID8 bit, 5-52
SIDLA bit, 5-53
signal transceivers. See transceivers.
signals
EXT CLK signal characteristics (table),
C-7
MXI-2 connector signal assignments
(table), C-4 to C-5
MXIbus signal characteristics (table),
C-6
TRG IN signal characteristics (table),
C-8
TRG OUT signal characteristics (table),
C-7