User manual

Index
VXI-MXI-2 User Manual Index - 12 © National Instruments Corporation
slave state machine
MXI-2, 2-5
VMEbus, 2-4
Slot 0, VXIbus
configuring
two-frame system, E-8
VXI-MXI-2, 3-5 to 3-6
VXI-MXI-2/B, 4-5 to 4-6
functions, 2-3
reconfiguring for Slot 0 devices placed
in another slot (warning)
VXI-MXI-2, 3-5
VXI-MXI-2/B, 4-5
SMB transceivers, 2-7
soft reset of registers, 5-1, D-5
specifications
electrical, A-5
environmental, A-3
MXIbus capability descriptions, A-1
performance, A-5
physical, A-4
requirements, A-4
VMEbus capability codes, A-2
SRIN bit, 5-25
SROUT bit, 5-25
SSINT* bit, D-5
START bit, 5-67
STOP bit, 5-66
STOPS bit, 5-83
switches. See jumper and switch settings.
SYSFAIL bit, 5-38
Sysfail inhibit bit, D-3
SYSFAIL* signal, D-4
SYSRESET* signal, 5-1, D-4
system configuration. See also
configuration; configuration of two-frame
system.
multiframe RM operation, 6-39 to 6-44
configuring A24 and A32
addressing windows, 6-44
configuring logical address
window, 6-39 to 6-40
configuring logical address window
example, 6-40 to 6-43
logical address assignments for
example VXIbus/MXIbus system
(table), 6-41
system administration and
initiation, 6-44
overview, 6-1
planning VXIbus/MXIbus system A16
address map, 6-23 to 6-28
A16 space allocations for all size
values (figure), 6-24
amount of A16 space allocated
(table), 6-23
example A16 space address map
diagram, 6-28
example VXIbus/MXIbus system
diagram, 6-27
required A16 space for example
VXIbus/MXIbus system
(table), 6-27
planning VXIbus/MXIbus system
logical address map, 6-2 to 6-14
address range allocation for
different size values (figure), 6-5
base and size combinations
(figure), 6-4
base and size combinations
(table), 6-4
base/size configuration format,
6-3 to 6-5
basic requirements for VXI-MXI-2
interfaces, 6-3
changing default address for PC
with MXIbus interface
(note), 6-8
example VXIbus/MXIbus system
(figure), 6-7
high/low configuration format, 6-5
logical address map diagram for
example VXIbus/MXIbus system
(figure), 6-10