User manual

Index
VXI-MXI-2 User Manual Index - 16 © National Instruments Corporation
VXIbus Trigger Drive Register
(VTDR), 5-35, D-5
VXIbus Trigger Mode Select Register
(VTMSR), 5-36
VXIbus TTL Trigger Configuration
Register (VTCR), 5-22
VXIbus Utility Configuration Register
(VUCR), 5-23 to 5-25
VXI-MXI-2 Control Register (VMCR),
5-30 to 5-32, D-4
VXI-MXI-2 Status Register (VMSR),
5-27 to 5-29, D-4
VXI-MXI-2 Trigger Control Register
(VMTCR), 5-42
VXIbus logical address. See logical address,
VXIbus.
VXIbus model code differences between
VXI-MXI and VXI-MXI-2, D-3
VXIbus settings
arbiter timeout, 7-9
arbiter type, 7-8
auto retry, 7-10
bus timeout, 7-8
fair requester, 7-9
illustration, 7-7
request level, 7-9
System Controller, 7-7 to 7-8
transfer limit, 7-9
VXIbus Slot 0. See Slot 0, VXIbus.
VXIbus trigger functionality, D-5
VXI-MXI and VXI-MXI-2 differences and
incompatibilities, D-1 to D-5
configuration switches and jumpers,
D-2 to D-3
hard reset, D-5
local interrupt conditions, D-4 to D-5
MXIbus connector, D-1 to D-2
required memory space, D-3
soft reset, D-5
Sysfail inhibit bit, D-3
VXIbus model code, D-3
VXIbus trigger functionality, D-5
VXI-MXI-2 Status/Control Register
(VMSR/VMCR), D-3 to D-4
VXI-MXI-2
block diagram, 2-2
description, 1-2 to 1-5
features, 1-3 to 1-5
front panel features, 1-5
functional description, 2-1 to 2-7
MXI-2 description, 1-2
optional equipment, 1-5 to 1-6
overview, 1-1
requirements for getting started,
1-1 to 1-2
VXI-MXI-2 Control Register (VMCR),
5-30 to 5-32, D-4
VXI-MXI-2 Status Register (VMSR),
5-27 to 5-29, D-4
VXI-MXI-2 Status/Control Register 2
(VMSR2/VMCR2), 5-59 to 5-60,
D-3 to D-5
VXI-MXI-2 Trigger Control Register
(VMTCR), 5-42
VXI-MXI-2 VXIplug&play soft front panel,
7-1 to 7-13
Board settings, 7-3 to 7-6
A16 write post and A24/A32 write
post, 7-4
address space and requested
memory, 7-3 to 7-4
interlocked, 7-5 to 7-6
logical address select and logical
address, 7-3
installing soft front panel, 7-1 to 7-2
Knowledge Base File, 7-13
MXIbus configuration options
auto retry, 7-12
bus timeout, 7-11
CLK10, 7-13
fair requester, 7-12
illustration, 7-10
parity checking, 7-12
System Controller, 7-11
transfer limit, 7-11
using soft front panel, 7-2 to 7-3