VXI B10 : User manual : Page 69

Register Descriptions

5

Chapter

This chapter contains detailed information on some of the VXI-MXI-2 registers, which

you can use to configure and control the module’s operation. Some of these registers are

a subset of the VXI-MXI-2 register set, which is accessible in VXIbus configuration

(A16) space, while others are accessible only in the lower 4 KB of the VXI-MXI-2

module’s A24/A32 memory space. All registers are accessible from either the MXIbus or

VXIbus.

If you are using a multiframe VXIbus Resource Manager application, you may not need

the information provided in this chapter.

Hard and Soft Reset

Each register description in this chapter indicates which bits are affected by a hard and/or

soft reset. A hard reset occurs when the mainframe is powered on and when the VMEbus

SYSRESET* signal is asserted. A soft reset occurs when the RESET bit in the VXIbus

Control Register (VCR) is written with a 1 while the VXI-MXI-2 is not in the PASSED

state. The VXI-MXI-2 enters the PASSED state shortly after a hard reset and cannot be

put into the soft reset state afterwards. The PASSED bit in the VXIbus Status Register

(VSR) indicates when the VXI-MXI-2 is in the PASSED state.

Register Description Format

A detailed description of each register follows. Each register description shows a diagram

of the register with the most significant bit (bit 31 for 32-bit registers, or bit 15 for 16-bit

registers) shown on the upper left, and the least significant bit (bit 0) at the lower right.

The upper 16 bits of a 32-bit register are accessed during a 16-bit cycle to the offset of

the register, while the lower 16 bits are accessed during a 16-bit cycle to the offset of the

register plus 2. During 8-bit cycles to a 32-bit register, the upper eight bits are accessible

at the offset of the register, and the lower eight bits are accessible at the offset of the

register plus 3, with the two middle bytes accessible at the offset of the register plus 1 and

2, respectively. The upper eight bits of a 16-bit register are accessed during an 8-bit cycle