User manual

Chapter 5 Register Descriptions

VXIbus MODID Register (VMIDR)

VXIbus Configuration Offset: 8 (hex)

Attributes: Read/Write 16, 8-bit accessible

15 14 13 12 11 10 9 8

1 1 OUTEN MODID[12] MODID[11] MODID[10] MODID[9] MODID[8]

76 54 321 0

MODID[7] MODID[6] MODID[5] MODID[4] MODID[3] MODID[2] MODID[1] MODID[0]

This register provides the status of the VXIbus MODID signals when the VXI-MXI-2 is

installed in slot 0. It also controls the assertion of the MODID signals. This register

conforms to the VXIbus Mainframe Extender specification.

Bit Mnemonic Description

15-14 1 Reserved

These bits are reserved. They return 11 (binary)

when the VMIDR is read. Any value can be

written to these bits when writing the VMIDR.

13 OUTEN MODID Output Enable

Writing a 1 to this bit enables the VXI-MXI-2

module’s MODID drivers. When this bit is

cleared, the VXI-MXI-2 does not drive the

MODID lines. You should set this bit only when

the VXI-MXI-2 is installed in slot 0. This bit is

cleared by a hard reset and is not affected by a

soft reset.

12-0 MODID[12:0] MODID Lines

These bits return the status of the 13 VXIbus

MODID lines when read. When OUTEN is set,

setting one of these bits drives the corresponding

MODID line high, while clearing one of these

bits drives the corresponding MODID line low.

These bits are not affected by hard and soft

resets.