Datasheet
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Würth Elektronik eiSos GmbH & Co. KG - Data Sheet - REV 1.0
14/25
WPMDM1500602/ 171050601
MagI³C Power Module
VDRM - Variable Step Down Regulator Module
DESIGN FLOW
Thermal Resistance θ
JA
[°C/W]
Board Area [cm²]
Package Thermal Resistance θ
JA
4 Layer
Printed Circuit Board with 35µm Copper
0LFM (0m/s) air
225LFM (1.14m/s) air
500LFM (2.54m/s) air
Evaluation Board Area
0
5
10
15
20
25
30
35
40
0 10 20 30 40 50 60
For
and only natural convection (i.e. no air flow), the PCB area can be smaller than 18cm
2
. This
corresponds to a square board with 3cm x 3cm copper area, 4 layers, and 35µm copper thickness. Higher copper
thickness will further improve the overall thermal performance. Note that thermal vias should be placed under the IC
package to easily transfer heat from the top layer of the PCB to the inner layers and the bottom layer.
PCB Layout Instructions:
PC board layout is an important part of DC-DC converter design. Poor board layout can disrupt the performance of a
DC-DC converter and surrounding circuitry by contributing to EMI, ground bounce and resistive voltage drop in the
traces. These can send erroneous signals to the DC-DC converter resulting in poor regulation or instability. Good
layout can be implemented by following five simple design rules.
1: Minimize area of switched current loops.
C
IN
VIN
PGND
VOUT
Power Module
C
OUT
Loop 1
Loop 2
High
di/dt
V
IN
V
OUT
Target is to identify the paths in the system which have discontinuous current flow. They are the most critical ones
because they act as an antenna and cause observable high frequency noise (EMI). The easiest approach to find the
critical paths is to draw the high current loops during both switching cycles and identify the sections which do not
overlap. They are the ones where no continuous current flows and high di/dt is observed. Loop1 is the current path
during the ON-time of the High-Side Mosfet. Loop2 is the current path during the OFF-time of the High-Side Mosfet.