Datasheet

Rx Shutdown
conditions per the EPT
Table?
Send EPT packet with
reason value
IOUT < 10% of IMAX?
VRECT target = 7V. Send
control error packets to
converge.
Yes
No
IOUT < 20% of IMAX?
VRECT target = 6.3V.
Send control error packets
to converge.
Yes
No
IOUT < 40% of IMAX?
VRECT target = 5.5V.
Send control error packets
to converge.
Yes
No
VRECT target= 5.1V.
Send control error packets
to converge.
Yes
No
Rx Active
Power Transfer
Stage
Tx Powered
without Rx
Active
Measure Rectified Power
and Send Value to Tx
bq51013B
www.ti.com SLUSB62A –MARCH 2013–REVISED OCTOBER 2013
Figure 28. Active Power Transfer Flow Diagram
Another requirement of the WPC v1.1 specification is to send the measured recieved power. This task is enabled
on the IC by measuring the voltage on the FOD pin which is proportional to the output current and can be scaled
based on the choice of the resitor to ground on the FOD pin.
Dynamic Rectifier Control
The Dynamic Rectifier Control algorithm offers the end system designer optimal transient response for a given
max output current setting. This is achieved by providing enough voltage headroom across the internal regulator
at light loads in order to maintain regulation during a load transient. The WPC system has a relatively slow global
feedback loop where it can take more than 90 ms to converge on a new rectifier voltage target. Therefore, the
transient response is dependent on the loosely coupled transformers output impedance profile. The Dynamic
Rectifier Control allows for a 2 V change in rectified voltage before the transient response will be observed at the
output of the internal regulator (output of the bq5101xB). A 1-A application allows up to a 1.5 Ω output
impedance. The Dynamic Rectifier Control behavior is illustrated in Figure 8 where R
ILIM
is set to 250 Ω.
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