Product data

UJA1167 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 2 — 18 April 2014 49 of 60
NXP Semiconductors
UJA1167
Mini high-speed CAN system basis chip with Standby/Sleep modes &
watchdog
11. Application information
11.1 Application diagram
(1) Actual capacitance value must be a least 1.76 F with 5 V DC offset (recommended capacitor value is 4.7 F)
(2) For bus line end nodes, R
T
= 60  in order to support the ‘split termination concept’. For sub-nodes, an optional ‘weak’
termination of e.g. R
T
= 1.3 k can be used, if required by the OEM.
Fig 13. Typical application using the UJA1167TK/VX
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