Datasheet

6. Command Table
W/R: 0: Write cycle 1: Read cycle C/D: 0: Command 1: Data D7~D0: -: Don’t care #: Valid Data
# Command W/R C/D D7 D6 D5 D4 D3 D2 D1 D0 Registers Default
1 Panel Setting (PSR)
0 0
0 0 0 0 0 0 0 0 00h
0 1 # # # # # # # #
RES[1:0],REG,KW/R,UD,
SHL,SHD_N,RST_N
0Fh
2
Power Setting
(PWR)
0 0
0 0 0 0 0 0 0 1 01h
0 1 - - - - - - # # VDS_EN,VDG_EN 03h
0 1 - - - - - # # # VCOM_HV,VGHL_LV[1:0] 00h
0 1 - - # # # # # # VDH[5:0] 26h
0 1 - - # # # # # # VDL[5:0] 26h
0 1 - - # # # # # # VDHR[5:0] 03h
3 Power OFF(POF) 0 0 0 0 0 0 0 0 1 0 02h
4
Power OFF
Sequence
Setting(PFS)
0 0 0 0 0 0 0 0 1 1 03h
0 1 - - # # - - - - T_VDS_OF 00h
5 Power ON(PON) 0 0 0 0 0 0 0 1 0 0 04h
6
Power ON
Measure(PMES)
0 0
0 0 0 0 0 1 0 1 05h
7
Booster Soft
Start(BTST)
0 0
0 0 0 0 0 1 1 0 06h
0 1 # # # # # # # # BT_PHA[7:0] 17h
0 1 # # # # # # # # BT_PHB[7:0] 17h
0 1 - - # # # # # # BT_PHC[5:0] 17h
8 Deep Sleep
0 0
0 0 0 0 0 1 1 1 07h
0 1 1 0 1 0 0 1 0 1 Check code A5h
9
Display Start
Transmission
1(DTM1,
white/black Data)
(x-byte command)
0 0 0 0 0 1 0 0 0 0 B/W Pixel Data (400×300) 10h
0 1 # # # # # # # # KPXL[1:8] 00h
0 1 .. .. .. .. .. .. .. .. .. …
0 1 # # # # # # # # KPXL[n-1:n] 00h
10 Data Stop
0 0
0 0 0 1 0 0 0 1 11h
1 1 # - - - - - - - 00h
11
Display
Refresh(DRF)
0 0 0 0 0 1 0 0 1 0 12h
12
VCOM LUT(LUTC)
(45-byte command,
structure of bytes
2~7 repeated)
0 0 0 0 1 0 0 0 0 0 20h
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