Data Sheet

Product Specification
Ver 1.2  18 / 43
(21) PLL Control (R30H)
Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0
Controlling PLL
0 0 0 0 1 1 0 0 0 0
0 1 - SEL_DIV[1:0] SEL_F[4:0]
The command controls the PLL clock frequency. The PLL structure must support the following frame rates:
.
2.7" e-Paper (B)