Data Sheet

www.waveshare.com
11／40
1) Panel Setting (PSR) (R00H)
Action
W/R
C/D
D7
D6
D5
D4
D3
D2
D1
D0
Setting the panel
0
0
0
0
0
0
0
0
0
0
0
1
RES1
RES0
LUT_EN
-
UD
SHL
SHD_N
RST_N
RES[1:0]: Display resolution setting (source×gate)
00b: 640×480 (default)
01b: 600×450
10b: 640×448
11b: 600×448
LUT_EN: LUT selection
0: Using LUT from external Flash.
1: Using LUT from register.
UD: Gate Scan Direction
0: Scan down First line to last: Gn→……→G1
1: Scan up. (default) First line to last: G1→ ……→
Gn
SHL: Source shift direction
0: Shift left. First data to last data: Sn→……→S1
1: Shift right First data to last data: S1→……→Sn
SHD_N: Booster switch
0: DC-DC converter OFF.
1: DC-DC converter ON (Default)
When SHD_N become low, DC-DC will turn OFF. Register and SRAM data will keep until VDD OFF. SD output
and VCOM will remain previous condition. It may have two conditions: 0v or floating.
RST_N: Soft Reset
0: The controller is reset. Reset all registers to their default value.
1: Normal operation (Default). Booster OFF, Register data are set to their default values, and SEG/BG/VCOM: 0V
When RST_N become low, driver will reset. All register will reset to default value. Driver all function will disable. SD output and
VCOM will base on previous condition. It may have two conditions: 0v or floating.
VCM_HZ: VCOM Hi-Z function
0: VCOM normal output. (Default)
1: VCOM floating.
2) Power Setting (PWR) (R01H)
Action
W/R
C/D
D7
D6
D5
D4
D3
D2
D1
D0
Selecting
Internal/External
Power
0
0
0
0
0
0
0
0
0
1
0
1
-
-
EDATA_SEL
EDATA_SET
-
VSource_LV_EN
VSource_EN
VGate_EN
0
1
-
-
-
-
-
-
VGHL_LVL[1:0]
0
1
-
-
VDPS_LV[5:0]
0
1
-
-
VDNS_LV[5:0]
EDATA_SEL: EDATA selection for pure driver mode
0 : When EDATA_SET=1, pixel bit =2`b11 output VDPS_L level
1 : When EDATA_SET=1, pixel bit =2`b11 output VDNS_L level (default)
EDATA_SET: EDATA setting for pure driver mode