Datasheet

7
6.3 Display Module AC characteristics
Parameter Symbol Min. Typ. Max. Unit
Clock frequency fckv - - 200 kHz
Minimum “L” clock pulse width twL 0.5 - - us
Minimum “H” clock pulse width twH 0.5 us
Clock rise time trckv - - 100 ns
Clock fall time tfckv - - 100 ns
SPV setup time tSU 100 - - ns
SPV hold time tH 100 - - ns
Pulse rise time trspv - - 100 ns
Pulse fall time tfspv - - 100 ns
Clock XCL cycle time tcy 16.7 20 - ns
D0 .. D7 setup time tsu 8 - - ns
D0 .. D7 hold time th 8 - - ns
XSTL setup time tstls 8 - - ns
XSTL hold time tstlh 8 - - ns
XLE on delay time tLEdly 40 - - ns
XLE high-level pulse width
(When VDD=1.7V to 2.1V)
tLEw 40 - - ns
XLE off delay time tLEoff 200 - - ns
Output setting time to +/- 30Mv
(Cload=200pF)
tout - - 12 us
OUTPUT LATCH CONTROL SIGNALS
OUT1~OUT1200
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