Datasheet

ManualsBrandsWaveshare ManualsMicrocontroller Accessories2-Channel UART to RS232 Module for Raspberry Pi Pico, SP3232EEN Transceiver

True +3.0V to +5.5V RS-232 Transceivers

SP3222E/3232E

DESCRIPTION

FEATURES

■ Meets true EIA/TIA-232-F Standards

from a +3.0V to +5.5V power supply

■ Minimum 120Kbps Data Rate Under Full

Load

■ 1µA Low-Power Shutdown with Receivers

Active (SP3222E)

■ Interoperable with RS-232 down to +2.7V

power source

■ Enhanced ESD Specifications:

±15kV Human Body Model

±15kV IEC1000-4-2 Air Discharge

±8kV IEC1000-4-2 Contact Discharge

The SP3222E/3232E series is an RS-232 transceiver solution intended for portable or hand-

held applications such as notebook or palmtop computers. The SP3222E/3232E series has

a high-efficiency, charge-pump power supply that requires only 0.1µF capacitors in 3.3V

operation. This charge pump allows the SP3222E/3232E series to deliver true RS-232

performance from a single power supply ranging from +3.3V to +5.0V. The SP3222E/3232E

are 2-driver/2-receiver devices. This series is ideal for portable or hand-held applications such

as notebook or palmtop computers. The ESD tolerance of the SP3222E/3232E devices are

over ±15kV for both Human Body Model and IEC1000-4-2 Air discharge test methods. The

SP3222E device has a low-power shutdown mode where the devices' driver outputs and

charge pumps are disabled. During shutdown, the supply current falls to less than 1µA.

SELECTION TABLE

LEDOMseilppuSrewoP

232-SR

srevirDsrevirD

srevirD

srevirDsrevirD

232-SR

srevieceRsrevieceR

srevieceR

srevieceRsrevieceR

lanretxE

stnenopmoCstnenopmoC

stnenopmoC

stnenopmoCstnenopmoC

nwodtuhS

LTT

etatS-3etatS-3

etatS-3

etatS-3etatS-3

fo.oN

sniPsniP

sniP

sniPsniP

2223PS

V5.5+otV0.3+224seYseY02,81

2323PS

V5.5+otV0.3+224oNoN61

V-

SHDN

C1+

V+

C1-

C2+

C2-

R1IN

GND

T1OUT

R2IN

SP3222E

T2OUT

T2IN

T1IN

R1OUT

DIP/SO

R2OUT

Note: See page 6 for other pinouts

Now Available in Lead Free Packaging

Summary of content (20 pages)

PAGE 1
SP3222E/3232E ® True +3.0V to +5.5V RS-232 Transceivers FEATURES ■ Meets true EIA/TIA-232-F Standards from a +3.0V to +5.5V power supply ■ Minimum 120Kbps Data Rate Under Full Load ■ 1µA Low-Power Shutdown with Receivers Active (SP3222E) ■ Interoperable with RS-232 down to +2.
PAGE 2
Input Voltages TxIN, EN ................................................... -0.3V to +6.0V RxIN .......................................................................... ±15V ABSOLUTE MAXIMUM RATINGS These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied.
PAGE 3
ELECTRICAL CHARACTERISTICS Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.0V with TAMB = TMIN to TMAX. Typical Values apply at VCC = +3.3V or +5.0V and TAMB = 25oC. PARAMETER MIN. TYP. MAX. UNITS +15 V CONDITIONS RECEIVER INPUTS Input Voltage Range -15 Input Threshold LOW 0.6 0.8 1.2 1.5 Input Threshold HIGH 1. 5 1.8 Input Hysteresis 0.3 Input Resistance 2.4 2.4 V VCC=3.3V VCC=5.0V V VCC=3.3V VCC=5.
PAGE 4
TYPICAL PERFORMANCE CHARACTERISTICS Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 120kbps data rates, all drivers loaded with 3kΩ, 0.1µF charge pump capacitors, and TAMB = +25°C. 14 12 4 10 Vout+ Vout- 2 Slew Rate [V/µs] Transmitter Output Voltage [V] 6 0 0 500 1000 1500 2000 -2 8 6 4 +Slew -Slew -4 2 -6 0 Load Capacitance [pF] 0 Figure 1. Transmitter Output Voltage VS.
PAGE 5
PIN NUMBER NAME SP3222E FUNCTION DIP/SO SSOP/TSSOP SP3232E EN Receiver Enable. Apply logic LOW for normal operation. Apply logic HIGH to disable the receiver outputs (high-Z state). 1 1 - C1+ Positive terminal of the voltage doubler charge-pump capacitor. 2 2 1 V+ +5.5V generated by the charge pump. 3 3 2 C1- Negative terminal of the voltage doubler charge-pump capacitor. 4 4 3 C2+ Positive terminal of the inverting charge-pump capacitor.
PAGE 6
EN 20 SHDN 1 C1+ 2 EN 19 VCC 18 SHDN 1 C1+ 2 V+ 3 18 GND C1- 4 17 C2+ 5 16 C2- 6 15 R1OUT V- 7 14 T2OUT R2IN 17 VCC V+ 3 16 GND T1OUT C1- 4 15 T1OUT R1IN C2+ 5 14 R1IN C2- 6 13 R1OUT N.C. V- 7 12 T1IN 8 13 T1IN T2OUT 8 11 T2IN 9 12 T2IN R2IN 9 10 R2OUT 10 SP3222E 11 SP3222E R2OUT N.C. DIP/SO SSOP/TSSOP Figure 4.
PAGE 7
VCC C5 C1 + + 0.1µF 2 C1+ 0.1µF + LOGIC INPUTS 0.1µF 19 VCC 6 C2- V+ + *C3 SP3222E SSOP TSSOP V- T1OUT 17 12 T2IN T2OUT 8 R2IN 0.1µF C2 + 0.1µF + + V+ RS-232 OUTPUTS LOGIC INPUTS RS-232 INPUTS LOGIC OUTPUTS *C3 SP3222E DIP/SO C4 12 T1IN T1OUT 15 11 T2IN T2OUT 8 R1IN 14 R2IN 9 5kΩ 10 R2OUT + 0.1µF 7 6 C2- + 0.1µF RS-232 OUTPUTS RS-232 INPUTS 5kΩ 5kΩ 1 EN V- 13 R1OUT 9 3 4 C1- 0.1µF 16 5kΩ 10 R2OUT C1 2 C1+ 5 C2+ 13 T1IN R1IN 0.
PAGE 8
DESCRIPTION The slew rate of the driver output is internally limited to a maximum of 30V/µs in order to meet the EIA standards (EIA RS-232D 2.1.7, Paragraph 5). The transition of the loaded output from HIGH to LOW also meets the monotonicity requirements of the standard. The SP3222E/3232E transceivers meet the EIA/ TIA-232 and V.28/V.24 communication protocols and can be implemented in battery-powered, portable, or hand-held applications such as notebook or palmtop computers.
PAGE 9
VCC C5 C1 + + 0.1µF VCC C1+ V+ + 0.1µF 0.1µF C3 C1- + C2 SP3222E SP3232E C2+ 0.1µF VC4 + C2TxOUT TxIN LOGIC INPUTS RxIN RxOUT LOGIC OUTPUTS 0.1µF 5kΩ EN *SHDN VCC GND 1000pF * SP3222 only Figure 8. SP3222E/3232E Driver Loopback Test Circuit [ T ] [ T T1 IN 1 T1 OUT 2 T T T T R1 OUT 3 R1 OUT 3 Ch1 5.00V Ch3 5.00V Ch2 5.00V M 5.00µs Ch1 Ch1 5.00V Ch3 5.00V 0V Figure 9. Driver Loopback Test Results at 120kbps Date: 02/24/05 ] T T1 IN 1 T1 OUT 2 T Ch2 5.
PAGE 10
Receivers The receivers convert EIA/TIA-232 levels to TTL or CMOS logic output levels. All receivers have an inverting tri-state output. These receiver outputs (RxOUT) are tri-stated when the enable control EN = HIGH. In the shutdown mode, the receivers can be active or inactive. EN has no effect on TxOUT. The truth table logic of the SP3222E/3232E driver and receiver outputs can be found in Table 2. In most circumstances, decoupling the power supply can be achieved adequately using a 0.
PAGE 11
Phase 4 — VDD transfer — The fourth phase of the clock connects the negative terminal of C2 to GND, and transfers this positive generated voltage across C2 to C4, the VDD storage capacitor. This voltage is regulated to +5.5V. At this voltage, the internal oscillator is disabled. Simultaneous with the transfer of the voltage to C4, the positive side of capacitor C1 is switched to VCC and the negative side is connected to GND, allowing the charge pump cycle to begin again.
PAGE 12
VCC = +5V C4 +5V + C1 C2 – –5V + – – + VDD Storage Capacitor + – VSS Storage Capacitor C3 –5V Figure 12. Charge Pump — Phase 1 VCC = +5V C4 + C1 C2 – + – – + VDD Storage Capacitor + – VSS Storage Capacitor C3 –10V Figure 13. Charge Pump — Phase 2 [ T ] +6V a) C2+ T GND 1 GND 2 b) C2- T -6V Ch1 2.00V Ch2 2.00V M 1.00µs Ch1 5.48V Figure 14.
PAGE 13
R RSS R RC C SW2 SW2 SW1 SW1 Device Under Test C CSS DC Power Source Figure 17. ESD Test Circuit for Human Body Model The Contact Discharge Method applies the ESD current directly to the EUT. This method was devised to reduce the unpredictability of the ESD arc. The discharge current rise time is constant since the energy is directly transferred without the air-gap arc.
PAGE 14
I➙ For the Human Body Model, the current limiting resistor (RS) and the source capacitor (CS) are 1.5kΩ an 100pF, respectively. For IEC-1000-4-2, the current limiting resistor (RS) and the source capacitor (CS) are 330Ω an 150pF, respectively. 30A 15A The higher CS value and lower RS value in the IEC1000-4-2 model are more stringent than the Human Body Model. The larger storage capacitor injects a higher voltage to the test point when SW2 is switched on.
PAGE 15
PACKAGE: PLASTIC SHRINK SMALL OUTLINE (SSOP) E H D A Ø e B A1 L DIMENSIONS (Inches) Minimum/Maximum (mm) Date: 02/24/05 16–PIN 20–PIN A 0.068/0.078 (1.73/1.99) 0.068/0.078 (1.73/1.99) A1 0.002/0.008 (0.05/0.21) 0.002/0.008 (0.05/0.21) B 0.010/0.015 (0.25/0.38) 0.010/0.015 (0.25/0.38) D 0.239/0.249 (6.07/6.33) 0.278/0.289 (7.07/7.33) E 0.205/0.212 (5.20/5.38) 0.205/0.212 (5.20/5.38) e 0.0256 BSC (0.65 BSC) 0.0256 BSC (0.65 BSC) H 0.301/0.311 (7.65/7.90) 0.301/0.311 (7.65/7.
PAGE 16
PACKAGE: PLASTIC DUAL–IN–LINE (NARROW) E1 E D1 = 0.005" min. (0.127 min.) A1 = 0.015" min. (0.381min.) D A = 0.210" max. (5.334 max). C A2 e = 0.100 BSC (2.540 BSC) Ø L B1 B eA = 0.300 BSC (7.620 BSC) ALTERNATE END PINS (BOTH ENDS) DIMENSIONS (Inches) Minimum/Maximum (mm) 16–PIN 18–PIN A2 0.115/0.195 (2.921/4.953) 0.115/0.195 (2.921/4.953) B 0.014/0.022 (0.356/0.559) 0.014/0.022 (0.356/0.559) B1 0.045/0.070 (1.143/1.778) 0.045/0.070 (1.143/1.778) C 0.008/0.014 (0.203/0.356) 0.008/0.
PAGE 17
PACKAGE: PLASTIC SMALL OUTLINE (SOIC) (WIDE) E H D A Ø e B A1 L DIMENSIONS (Inches) Minimum/Maximum (mm) Date: 02/24/05 16–PIN 18–PIN A 0.090/0.104 (2.29/2.649) 0.090/0.104 (2.29/2.649)) A1 0.004/0.012 (0.102/0.300) 0.004/0.012 (0.102/0.300) B 0.013/0.020 (0.330/0.508) 0.013/0.020 (0.330/0.508) D 0.398/0.413 (10.10/10.49) 0.447/0.463 (11.35/11.74) E 0.291/0.299 (7.402/7.600) 0.291/0.299 (7.402/7.600) e 0.050 BSC (1.270 BSC) 0.050 BSC (1.270 BSC) H 0.394/0.419 (10.00/10.64) 0.
PAGE 18
PACKAGE: PLASTIC SMALL OUTLINE (SOIC) (NARROW) E H h x 45° D A Ø e B A1 L DIMENSIONS (Inches) Minimum/Maximum (mm) Date: 02/24/05 16–PIN A 0.053/0.069 (1.346/1.748) A1 0.004/0.010 (0.102/0.249) B 0.013/0.020 (0.330/0.508) D 0.386/0.394 (9.802/10.000) E 0.150/0.157 (3.802/3.988) e 0.050 BSC (1.270 BSC) H 0.228/0.244 (5.801/6.198) h 0.010/0.020 (0.254/0.498) L 0.016/0.050 (0.406/1.270) Ø 0°/8° (0°/8°) SP3222E, SP3232E True +3.0 to +5.
PAGE 19
PACKAGE: PLASTIC THIN SMALL OUTLINE (TSSOP) DIMENSIONS in inches (mm) Minimum/Maximum Symbol D e 16 Lead 20 Lead 0.193/0.201 0.252/0.260 (4.90/5.10) (6.40/6.60) 0.026 BSC (0.65 BSC) 0.026 BSC (0.65 BSC) e 0.126 BSC (3.2 BSC) 0.252 BSC (6.4 BSC) 1.0 OIA 0.169 (4.30) 0.177 (4.50) 0.039 (1.0) 0’-8’ 12’REF e/2 0.039 (1.0) 0.043 (1.10) Max D 0.033 (0.85) 0.037 (0.95) 0.007 (0.19) 0.012 (0.30) 0.002 (0.05) 0.006 (0.15) (θ2) 0.008 (0.20) 0.004 (0.09) Min 0.004 (0.09) Min Gage Plane (θ3) 0.010 (0.
PAGE 20
ORDERING INFORMATION Model Temperature Range Package Type SP3222ECA ............................................. 0˚C to +70˚C .......................................... 20-Pin SSOP SP3222ECA/TR ....................................... 0˚C to +70˚C .......................................... 20-Pin SSOP SP3222ECP ............................................. 0˚C to +70˚C ............................................ 18-Pin PDIP SP3222ECT ............................................. 0˚C to +70˚C ..............