Datasheet

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PN532_C1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2017. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.6 — 28 November 2017
115436 155 of 222
NXP Semiconductors
PN532/C1
Near Field Communication (NFC) controller
8.6.23.15 CIU_BitFraming register (EEh or 633Dh)
Adjustments for bit oriented frames.
Table 202. CIU_BitFraming register (address EEh or 633Dh) bit allocation
Bit 7 6 5 4 3 2 1 0
Symbol StartSend RxAlign[2:0] - TxLastBits[2:0]
Reset 0 0000000
Access W R/W R/W R/W R R/W R/W R/W
Table 203. Description of CIU_BitFraming bits
Bit Symbol Description
7 StartSend Set to logic 1, the transmission of data starts.
This bit is only valid in combination with the Transceive command.
6 to 4 RxAlign[2:0] Used for reception of bit oriented frames: RxAlign[2:0] defines the bit
position for the first received bit to be stored in the FIFO. Further
received bits are stored in the following bit positions.
Example:
RxAlign[2:0] = 0: The LSB of the received bit is stored at bit 0, the
second received bit is stored at bit position 1.
RxAlign[2:0] = 1: The LSB of the received bit is stored at bit 1, the
second received bit is stored at bit position 2
RxAlign[2:0] = 7: The LSB of the received bit is stored at bit 7, the
second received bit is stored in the following byte
at bit position 0.
These bits shall only be used for bitwise anticollision at 106 kbit/s in
Passive Communication or Reader/Writer mode. In all other modes it
shall be set to logic 0.
3 - Reserved.
2 to 0 TxLastBits[2:0] Used for transmission of bit oriented frames: TxLastBits defines the
number of bits of the last byte that shall be transmitted. A 000b indicates
that all bits of the last byte shall be transmitted.