Datasheet

Table Of Contents
PN532_C1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2017. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.6 — 28 November 2017
115436 164 of 222
NXP Semiconductors
PN532/C1
Near Field Communication (NFC) controller
8.6.23.24 CIU_RxThreshold register (6308h)
Selects thresholds for the bit decoder.
8.6.23.25 CIU_Demod register (6309h)
Defines demodulator settings.
Table 220. CIU_RxThreshold register (address 6308h) bit allocation
Bit 7 6 5 4 3 2 1 0
Symbol MinLevel[3:0] - Collevel[2:0]
Reset 10000100
Access R/W R/W R/W R/W R R/W R/W R/W
Table 221. Description of CIU_RxThreshold bits
Bit Symbol Description
7 to 4 MinLevel[3:0] Defines the minimum signal strength at the decoder input that shall be
accepted. If the signal strength is below this level, it is not evaluated.
3- Reserved
2 to 0 Collevel[2:0] Defines the minimum signal strength at the decoder input that has to be
reached by the weaker half-bit of the Manchester-coded signal to generate
a bit-collision relatively to the amplitude of the stronger half-bit.
Table 222. CIU_Demod register (address 6309h) bit allocation
Bit 7 6 5 4 3 2 1 0
Symbol AddIQ[1:0] FixIQ - TauRcv[1:0] TauSync[1:0]
Reset 01001101
Access R/W R/W R/W R R/W R/W R/W R/W
Table 223. Description of CIU_Demod bits
Bit Symbol Description
7 to 6 AddIQ[1:0] Defines the use of I and Q channel during reception.
Note: FixIQ has to be set to logic 0 to enable the following settings.
ValueDescription
00Select the stronger channel
01Select the stronger and freeze the selected during communication
10Combines the I and Q channel
11RFU
5 FixIQ If set to logic 1 and AddIQ[0] is set to logic 0, the reception is fixed to I
channel.
If set to logic 1 and AddIQ[0] is set to logic 1, the reception is fixed to Q
channel.
4- Reserved
3 to 2 TauRcv[1:0] Changes time-constant of internal PLL during data receiving.
Note: If set to 00h, the PLL is frozen during data receiving.
1 to 0 TauSync[1:0] Changes time-constant of internal PLL during burst (out of data reception)