Datasheet

PN532_C1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2017. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.6 — 28 November 2017
115436 187 of 222
NXP Semiconductors
PN532/C1
Near Field Communication (NFC) controller
8.6.23.54 CIU_TestDAC1 register (6329h)
Defines the test value for TestDAC1.
8.6.23.55 CIU_TestDAC2 register (632Ah)
Defines the test value for TestDAC2.
8.6.23.56 CIU_TestADC register (632Bh)
Shows the actual value of ADC I and Q channel.
Table 280. CIU_TestDAC1 register (address 6329h) bit allocation
Bit 7 6 5 4 3 2 1 0
Symbol - - TestDAC1[5:0]
Reset 00XXXXXX
Access R R R/W R/W R/W R/W R/W R/W
Table 281. Description of CIU_TestDAC1 bits
Bit Symbol Description
7 to 6 - Reserved.
5 to 0 TestDAC1[5:0] Defines the test value for TestDAC1. The output of the DAC1 can be
switched to AUX1 by setting AnalogSelAux1 to 0001 in the
CIU_AnalogTest register.
Table 282. CIU_TestDAC2 register (address 632Ah) bit allocation
Bit 7 6 5 4 3 2 1 0
Symbol - - TestDAC2[6:0]
Reset 00XXXXXX
Access R R R/W R/W R/W R/W R/W R/W
Table 283. Description of CIU_TestDAC2 bits
Bit Symbol Description
7 to 6 - Reserved.
5 to 0 TestDAC2[6:0] Defines the test value for TestDAC2. The output of the DAC2 can be
switched to AUX2 by setting AnalogSelAux2 to 0001 in the
CIU_AnalogTest register.
Table 284. CIU_TestADC register (address 632Bh) bit allocation
Bit 7 6 5 4 3 2 1 0
Symbol ADC_I[3:0] ADC_Q[3:0]
Reset XXXXXXXX
Access RRRRRRRR
Table 285. Description of CIU_TestADC bits
Bit Symbol Description
7 to 4 ADC_I[3:0] Shows the actual value of ADC I channel.
3 to 0 ADC_Q[3:0] Shows the actual value of ADC Q channel.