User's Manual

Wi2Wi, Inc. Rev.1.1

Data Sheet, WLAN-Bluetooth Module– W2CBW009S

Dated: October 20, 2009

The content of this document is to be treated as strictly confidential and is not to be disclosed,

Reproduced or used, except as authorized in writing by Wi2Wi, Inc.

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1 Mbps, 0.1% BER - -84 - dBm

2 Mbps, 0.1% BER - -87 - dBm

Receive Sensitivity

3 Mbps, 0.1% BER - -82 - dBm

Initial Carrier Frequency

Tolerance

- 5 - kHz

5 WLAN External Host Interfaces

For connection to a host processor, the W2CBW009S supports the Secure Digital Input Output

(SDIO) and Generic SPI (G-SPI) interfaces for WLAN. The choice of interface is dependent on the

required data throughput, with SDIO having a throughput that is approximately four times greater than

G-SPI.

If the WLAN SDIO interface is selected for connection to a host processor, then the host processor must

support SDIO – (SD is not sufficient). If the selected processor does not have an integrated SDIO

controller, then an external SDIO bridge can be used (e.g. SDIO-PCI Bridge for interfacing with a

process supporting PCI interface only).

If the WLAN G-SPI interface is selected for connection to a host processor, then the host processor

must support G-SPI – (SPI is not sufficient). If the selected processor only has SPI, then it might be

possible to implement G-SPI with a combination of the SPI and a GPIO pin for interrupt. If the

selected processor does not have SPI interface, then it might be possible to implement a G-SPI

interface using a combination of GPIO pins. Please contact your sales representative if your

processor does not support SDIO or G-SPI interfaces.

5.1 SDIO Interface

W2CBW009S supports SDIO device interface that conforms to the industry standard SDIO Full-

Speed card specification and allows a host controller using the SDIO bus protocol to access the

WLAN device. The SDIO interface contains interface circuitry between an external SDIO bus and

the internal shared bus.

W2CBW009S acts as a device on the SDIO bus. The host unit can access registers of the SDIO

interface directly and can access shared memory in the device through the use of BARs and a DMA

engine.

The SDIO device interface main features include:

•

On-chip memory used for CIS

•

Supports SPI, 1-bit SDIO, and 4-bit SDIO transfer modes at the full clock range of 0 to 50

MHz

•

Special interrupt register for information exchange