User's Manual
Table Of Contents
- Introduction
- Abbreviation
- Features
- Electrical Specifications
- Host interface pin assignments
- LGA Pad Diagram
- Pin Assignments
- Power supply
- USB interface
- SGMII interface
- UIM interface
- Control interface
- Power-on Signal
- Wake-up interface
- Reset Signal
- WWAN state Signal
- Digital interface
- JTAG Interface
- SPI Master Interface
- PCM Interface
- I2S Interface
- I2C Interface
- UART Interface
- ADC Interface
- RF Specifications
- RF connections
- Interference and sensitivity
- GNSS external circuit design
- RF Specification
- 3.5.1 Band support
- 3.5.2 Bandwidth support
- 3.5.3 RF Transmit Specification
- 3.5.4 RF Receiver Specification
- 3.5.5 GNSS Receiver Specification
- Power
- Power consumption
- Software Interface
- Support tools
- USB interface
- Mechanical and Environmental Certifications
- PCBA Form Factor
- Reflow
- PCB pad design
- Labeling
- SMT Voids control
- Mother board PCB thickness
- Stencil design
- Thermal considerations
- Regulatory Compliance and Certification
- Certification testing
- Packaging
- Tape-and-Reel Package
- Single Packaging for Samples
- MSL level
- Safety Recommendation
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HW Design Guidelines
Each side can wake the other side by toggling wakeup signal high and allowing the other
side to go to sleep when not needed by toggling it low.
“WAKEUP_IN” (Host: Output, Modem: Input):
– LOW: SoC does not require the MODEM (allowing it to sleep).
–
HIGH: SoC requires the MODEM or acknowledges it is ready following a
wakeup request from the MODEM.
“WAKEUP_OUT” (Host: Input, Modem: Output):
– LOW: The MODEM does not require the Host (allowing it to sleep)
–
HIGH: The MODEM requires the Host or acknowledges it is ready
following a wakeup request from the SoC.
When M18QF/M18QA Series modules act as modem, keep WAKEUP_IN high before system
boot process is complete, after system boot, keep WAKEUP_IN low. WAKEUP_IN and
WAKEUP_OUT behavior of host mode will be discussed according to product specification.
2.6.3. Reset Signal
The Reset Signal is a hardware reset signal to control the system reset directly. You can
connect it to a key or a control signal. A low pulse (3s<tlow<8s) after power on will reset the
module, see figure7.
Figure 5. Reset Signals circuit