User's Manual
Table Of Contents
- Introduction
- Abbreviation
- Features
- Electrical Specifications
- Host interface pin assignments
- LGA Pad Diagram
- Pin Assignments
- Power supply
- USB interface
- SGMII interface
- UIM interface
- Control interface
- Power-on Signal
- Wake-up interface
- Reset Signal
- WWAN state Signal
- Digital interface
- JTAG Interface
- SPI Master Interface
- PCM Interface
- I2S Interface
- I2C Interface
- UART Interface
- ADC Interface
- RF Specifications
- RF connections
- Interference and sensitivity
- GNSS external circuit design
- RF Specification
- 3.5.1 Band support
- 3.5.2 Bandwidth support
- 3.5.3 RF Transmit Specification
- 3.5.4 RF Receiver Specification
- 3.5.5 GNSS Receiver Specification
- Power
- Power consumption
- Software Interface
- Support tools
- USB interface
- Mechanical and Environmental Certifications
- PCBA Form Factor
- Reflow
- PCB pad design
- Labeling
- SMT Voids control
- Mother board PCB thickness
- Stencil design
- Thermal considerations
- Regulatory Compliance and Certification
- Certification testing
- Packaging
- Tape-and-Reel Package
- Single Packaging for Samples
- MSL level
- Safety Recommendation
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HW Design Guidelines
2.6.4. WWAN state Signal
The WWAN state pin definition as below.
WWAN state pin output “high”
When device register to network, the WWAN state pin output “high”.
WWAN state pin output “low”
When device not to register to network, the WWAN state pin output “low”.
2.7. Digital interface
This section provides required AC timing information related to module digital interfaces.
2.7.1. JTAG Interface
M18QF/M18QA Series provide one JTAG interface, leave JTAG pins floating if not used.
Figure 6. JTAG schematic (example)
2.7.2. SPI Master Interface
SPIM_CLK – Output clock
SPIM_CS – Output, chip-select