User's Manual

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W
LAN/BT System Integration Manual
Rank Function Pin(s) Layout Remarks
1
st
RFin/out
BT_RF
WLAN_RF
Very
Important
Des ig nfor50ohmcharacteri stic
impedance
2
nd
DC Supply
VCC_3V3
VCC_VIO_X1
VCC_VIO_X2
Very
Important
VCClines shouldbeshortandwide.
Routeawayfromsensitiveanalog
signals.
3
rd
Gr ound GND
Careful
Layout
providepropergrounding.
DigitalPins:
SDIO
interface
SD_CLK,SD_CMD,
SD_DAT_0,SD_DAT_1,
SD_DAT_2,SD_DAT_3
UART TXD,RXD,CTS,RTS
Digital
Aud io
BT_PCM_DIN,
BT_PCM_SYNC,
BT_PCM_CLK,
BT_PCM_DOUT
RESET RESET#
SleepCl ock SLEEP_C LK
Antenna
Detection
VCC_BT_ANT_DIAG,
BT_ANT_DIAG,
VCC_WLAN_ANT_DIAG,
WLAN_ANT_DIAG
Antenna
Select
ANT_SEL_P,ANT_SEL_N
JTAG JTAG_TCK,JTAG_TDI,
JTAG_TDO,
JTAG_TRSTn,
JTAG_TMS_SYS,
JTAG_TMS_CPU
4
th
Common
Pr actice
Followcommonpracticerulesfor
digitalpinrouting.

Table3‐1:Pinlistinorderofdecreasingimportanceforlayoutdesign

3.2.1.1RFI/Oconnection
 TheRFantennaconnectionpinBT_RF&WLAN_RFareverycriticalinlayoutdesign.ThePCBline
mustbedesignedtoprovide50Ωcharacteristicimpedanceandminimumlossuptoradiatingelement.
 ProvidepropertransitionbetweentheBT_RF&WLAN_RFpadstoapplicationboardPCB.
 IncreaseGNDkeep‐out(i.e.clearance)forBT_RF&WLAN_RFpinstoatleast250μmupto
adjacentpadsmetaldefinitionandupto250μmontheareabelowtheDataModule,asdescribed
in
FigureXXX.
 Thetransmissionlineup toantennaconnector orpadmaybeamicrostriporastripline.Inany