User's Manual

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LAN/BT System Integration Manual
casemustbedesignedtoachieve50Ωcharacteristicimpedance.
 Microstriplinesareusuallyeasiertoimplementandthereducednumberoflayertransitionsupto
antennaconnectorsimplifiesthedesignanddiminishesreflectionlosses.However,the
electromagneticfieldextendstothefreeairinterfaceabovethestriplineandmayinteractwith
othercircuitry.
 Buriedstriplineexhibitsbettershieldingtoincomingandgeneratedinterferences.Thereforeare
preferredforsensitiveapplication.Incaseastriplineisimplemented,carefullycheckthatthevia
pad‐stackdoesnotcouplewithothersignalsonthecrossedandadjacentlayers.
 Minimizethetransmissionlinelength;theinsertionlossshouldbeminimizedasmuchaspossible,
intheorderofafewtenthsofadB.
 ThetransmissionlineshouldnothaveabruptchangetothicknessandspacingtoGND,butmustbe
uniformandroutedassmoothlyaspossible.
 ThetransmissionlinemustberoutedinasectionofthePCB whereminimalinterferencefrom
noisesourcescanbeexpected.
 RouteANTlinefarfromothersensitivecircuitsasitisasourceofelectromagneticinterference.
 AvoidcouplingwithVCCroutingandanalogaudiolines.
 EnsuresolidmetalconnectionoftheadjacentmetallayeronthePCBstack‐uptomainground
layer.
 AddGNDviasaroundtransmissionline.
 Ensurenoothersignalsareroutedparalleltotransmissionline,orthatothersignalscrosson
adjacentmetallayerIfthedistancebetweenthetransmissionlineandtheadjacentGNDarea(on
thesamelayer)doesnotexceed5timesthetracewidthofthemicrostrip,usethe“Coplanar
Waveguide”modelfor50Ωcharacteristicimpedancecalculation.
 Don’troutemicrostriplinebelowdiscretecomponentorothermechanicsplacedontoplayer.
 Whenterminatingtransmissionlineonantennaconnector(orantennapad)itisveryimportantto
strictlyfollowtheconnectormanufacturer’srecommendedlayout.
 GNDlayerunderRFconnectorsandclosetoburiedviasshouldbecutoutinordertoremovestray
capacitanceandthuskeeptheRFline50Ω.Inmostcasesthelargeactivepadoftheintegrated
antennaorantenna
connectorneedstohaveaGNDkeep‐out(i.e.clearance)atleastonfirstinner
layertoreduceparasiticcapacitancetoground.Notethatthelayoutrecommendationisnot
alwaysavailablefromconnectormanufacturer:e.g.theclassicalSMAPin‐Through‐Holeneedsto
haveGNDclearedonallthelayersaround
thecentralpinuptoannularpadsofthefourGNDposts.
Check50ΩimpedanceofANTline.

3.2.1.2MainDCsupplyconnection
 TheDCsupplyofWLAN/BTmodulesisveryimportantfortheoverallperformanceandfunctionality
oftheintegratedproduct.
 VCCconnectionmaycarryamaximumburstcurrentintheorderof0.5A.Therefore,itistypically
implementedasawidePCBlinewithshortroutingfromDCsupply(DC‐DCregulator,batterypack,
etc)
 EachvoltagedropintheDCsupplytrackwillrestricttheoperatingmarginatthemainDCsource
output.Therefore,the
PCBconnectionhastoexhibitaminimumorzerovoltagedrop.Avoidany
seriescomponentwithEquivalentSeriesResistance(ESR)greaterthanafewmΩ.
 Giventhelargeburstcurrent,VCClineisasourceofdisturbanceforothersignals.Thereforeroute
VCCthroughaPCBareaseparatedfrom
sensitiveanalogsignals.Typicallyitisgoodpracticeto
interposeatleastonelayerofPCBgroundbetweenVCCtrackandothersignalrouting.
 TheVCCsupplycurrentsupplyflowsbacktomainDCsourcethroughGNDasgroundcurrent:
provideadequatereturnpathwithsuitableuninterruptedgroundplanetomainDCsource.