User's Manual

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LAN/BT System Integration Manual
 AtankcapacitorwithlowESRisoftenusedtosmoothcurrentspikes.Thisismosteffectivewhen
placedascloseaspossibletoVCC.FrommainDCsource,firstconnectthecapacitorandthenVCC.
IfthemainDCsourceisaswitchingDC‐DCconverter,placethelargecapacitorclosetotheDC‐DC
outputandminimizetheVCCtracklength.OtherwiseconsiderusingseparatecapacitorsforDC‐DC
converterandWLAN/BTmoduletankcapacitor.
 VCC_3V3isdirectlyconnectedtotheRFpoweramplifier.AddcapacitorinthepFrangefromVCC
toGNDalongthesupplypath.
 SinceVCC_3V3isdirectlyconnectedtoRFPowerAmplifier,voltagerippleathighfrequencymay
resultinunwantedspuriousmodulationoftransmitterRFsignal.Thisisespeciallyseenwith
switchingDC‐DCconverters,inwhichcaseitisbettertoselectthehighestoperatingfrequencyfor
theswitcherandaddalargeL‐CfilterbeforeconnectingtoWLAN/BTmoduleintheworstcase.
 ThelargecurrentgeneratesamagneticfieldthatisnotwellisolatedbyPCBgroundlayersand
whichmayinteractwithotheranalogmodules(e.g.VCO)evenifplacedonoppositesideofPCB.In
thiscaserouteVCCawayfromothersensitivefunctionalunits.
 IfVCCisprotectedbytransientvoltagesuppressor/reversepolarityprotectiondiodetoensure
thatthevoltagemaximumratingsarenotexceeded,placetheprotectingdevicealongthepath
fromtheDCsourcetowardWLAN/BTmodule,preferablyclosertotheDCsource(otherwise
functionalitymaybecompromised).

3.2.1.3Modulegrounding
 GoodconnectionofthemodulewithapplicationboardsolidgroundlayerisrequiredforcorrectRF
performance.ItsignificantlyreducesEMCissues.
 ConnecteachGNDpinwithapplicationboardsolidGNDlayer.Itisstronglyrecommendedthat
eachGNDpadsurroundingVCCandANTpinshaveoneormorededicatedviadowntoapplication
boardsolidgroundlayer.
 IftheapplicationboardisamultilayerPCB,thenitisrequiredtotighttogethereachGNDareawith
completeviastackdowntomainboardgroundlayer.
 Itisrecommendedtoimplementonelayeroftheapplicationboardasgroundplane.
 GoodgroundingofGNDpadswillalsoensurethermalheatsink.

3.2.1.4Digitalpins
 ExternalReset(RESET#):inputforexternalreset,alogiclowvoltagewillresetthemodule.RESET#
havetobeassertedbeforeVCCispoweredON,andthede‐assertionofRESET#needsatleast1ms
delayafterVCCispoweredandstable.
 SDIO(SD_CLK,SD_CMD,SD_DAT_0,SD_DAT_1,SD_DAT_2,SD_DAT_3):theSDIOlayoutmaybe
criticaliftheapplicationprocessorisplacedfarawayfromWLAN/BTmoduleorinclosevicinityof
RFantenna.Inthefirstcasethelongconnectionmayradiatehigherharmonicofdigitaldata.Inthe
secondcasethesameharmonicsmaybepickedupandcreateself‐interferencethatcanreducethe
sensitivityofWLAN/BTReceiverchannelswhosecarrierfrequencyiscoincidentwithharmonic
frequencies.InthelatercaseusingRFbypasscapacitorsonthedigitallinewillmitigatethe
problem.
 DigitalAudio(BT_PCM_CLK,BT_PCM_SYNC,BT_PCM_DIN,BT_PCM_DOUT):thePCMinterface
requiresthesameconsiderationregardingelectro‐magneticinterferenceastheSDIO.Keepthe
tracesshortandavoidcouplingwithRFlineorsensitiveanaloginputs.
 UART(TXD,RXD,CTS,RTS):theserialinterfacerequirethesameconsiderationregarding
electro‐magneticinterferenceasforSDIO.KeepthetracesshortandavoidcouplingwithRFlineor
sensitiveanaloginputs.
 JTAG(JTAG_TCK,JTAG_TDI,JTAG_TDO,JTAG_TRSTn,JTAG_TMS_SYS,JTAG_TMS_CPU):thedebug