User's Manual
Table Of Contents
- 2035-UM1xx.book
- Table of Contents
- List of Figures
- List of Tables
- Section 1: Introduction
- Section 2: Hardware System Overview
- Section 3: BCM2035 Usage Models
- Section 4: Hardware Configuration
- Section 5: Software Configuration
- Introduction
- Hardware Power-Up Sequence
- Boot ROM Power-Up Sequence
- Firmware Power-Up Sequence
- BCM2035 Mini-Drivers
- Loading Mini-Drivers from USB
- Load Mini-Drivers From UART
- SCO Configuration
- Frequency Trimming
- UART Sleep Mode Operation
- Section 6: Configuration Data File System
- Section 7: Vendor-Specific HCI Command Reference
- Section 8: ASCII Hex File Download Protocol
- Section 9: ASCII HEX File Format
- Section 10: Configuration Data Download Protocol
- Section 11: Configuration Data Image Format
- Section 12: UART Start-up Sequence
- Section 13: USB Start-up Sequence
9/29/2004 OV4F2
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User Manual BCM2035
04/23/03
Broadcom Corporation
Document 2035-UM100-R Hardware Power-Up Sequence Page 33
HARDWARE POWER-UP SEQUENCE
The
BCM2035 contains a Power On Reset circuit. The desired voltage levels are checked for both CORE and
I/O power. An LPO clock is required (external or internal) for proper H/W initialization. Without the presence of
the LPO clock, the
BCM2035 will remain in the state of reset (i.e crystal warm-up period) forever.
The hardware power-up sequence is shown as the Initialize Hardware block in Figure 17 on page 32.
The Power-On Reset occurs when power is applied to the BCM2035, and RESET_N goes from Low to High.
The RESET_N signal has an internal Pull-Up, so it may be left unconnected such that the Power-On Reset
occurs automatically when power is applied to the chip, or the RESET_N signal may be controlled externally.
The following criteria must be met for the POR to occur successfully:
• If external LPO mode is selected, the LPO must be 32.768 kHz, enabled, and stable.
• If a TCXO or other clock is being used for the main clock, the clock must be enabled. If a crystal is being
used with the
BCM2035 crystal oscillator circuit, it will start automatically on power-up.
• Correct power levels must be applied to VDD_IO, VDD_CORE, and all RF VDD pins.
• RESET_N must transition from Low to High after power has been applied, or during power-up.
The POR lasts for 192 cycles of the Low Power Oscillator (approximately 32kHz), or approximately 6ms. If the
BCM2035 is being used in external LPO mode, and the main clock frequency is to be auto-detected, the main
clock must be stable before 192 cycles of the LPO complete.
Toggling the RESET_N signal Low and High at any time after the
BCM2035 is powered up will cause the chip
to reboot and go through this Power-On Reset sequence.
BOOT ROM POWER-UP SEQUENCE
Figure 18 on page 34 shows the BOOT ROM power-up sequence. The BOOT ROM code is responsible for
correctly initializing the system by programming the encoded crystal frequency, downloading mini-drivers,
applying boot code patches and launching the firmware or mini-driver (either from FLASH or program ROM).
“Crystal Programming” on page 35 through “Read Flash” on page 37 discuss the three phases of the boot
sequence:
1. Crystal Programming
2. Reading EEPROM or Flash for patches and code updates
3. Launching firmware from either FLASH or program-ROM