Maintenance Manual

18
DIAG LEDs
Cat. Bits
State Bits
11
10
9
8
7
6
5
4
3
2
1
0
Fail on
P12V_A
UX VR
Fail on
P3V3_AUX
VR
Fail on
P2V5_AUX
VR
Fail on
P1V8_AUX VR
Fail on
P1V2_AUX
VR
Fail on
P1V15_AUX
VR
Fail on
PVNN_PCH
_AUX VR
Fail on
P1V05_PCH_A
UX VR
MGMT
CPLD Failed
(CPLD_NE
W_HEARTB
EAT_N)
BMC Failed
(LED_BMC_
HB_L
ED_N)
PCH power
failed or
PCH failed
(PCH_DSW_
PWROK)
PCH power
failed or
PCH failed
(PCH_SLP_S
US_N)
PCH power
failed or
PCH failed
(PCH_SLP_
A_N)
PCH power
failed or
PCH failed
(PCH_RSMRS
T_SCPLD_N)
CPU0
failed or
CPU0
thermal
tripped
CPU1 failed
or
CPU1
thermal
tripped
CPU0 failed
or
CPU0
thermal
tripped
CPU1 failed
or
CPU1
thermal
tripped
DIMM
thermal
events of
CPU0
DIMM
thermal
events of
CPU1
CPU VR hot
PCH thermal
tripped
Incorrect
CPU
installed
on CPU0
Incorrect
CPU
installed on
CPU1
CPU
thermal
tripped or
CPU power
failed
PCH thermal
tripped
Card/Riser
installed NG
on Riser1
Card/Riser
installed NG
on Riser2
Thermal
alert from
temperature
sensors
Incorrect
M.2
installed
Incorrect
CPU
installed
on CPU0
Incorrect
CPU
installed on
CPU1
Check
PCH_SLP_S3
_N,
PCH_SLP_S4
_N
and BMC
chip
(BMC_ONCT
L_N)
Card/Riser
installed NG
on Riser1
Card/Riser
installed NG
on Riser2
Thermal
alert from
temperature
sensors
Incorrect
M.2
installed
Check PDB
P12V
Check PDB
P5V
Check PDB
P3V3
Check P5V
power and
VR (PU59)
Check P3V3
power and
VR
(PU60 or
PU62)
Check
P1V2_V
DDQ_AB
C power
and VR
Check
P1V2_VDD
Q_DEF
power and
VR
Check
P1V2_VDD
Q_GHJ
power and
VR
Check
P1V2_VDDQ
_KL
M power
and VR
Check
P0V6_VTT_A
BC
power/VR
Check
P0V6_VTT_
DEF
power/VR
Check
P0V6_VTT_
GHJ
power/VR
Check
P0V6_VTT_K
L
M power/VR
Check
CPU0_PVC
CIO power
and VR
Check
CPU0_PVC
CIN power
and VR
Check
CPU0_PVCCS
A
power and
VR
Check
CPU1_PVCC
IO power
and
VR
Check
CPU1_PVC
CIN power
and VR
Check
CPU1_PVCCS
A power and
VR
Port 80 --
bit 7
Port 80 –
bit6
Port 80 –
Bit 5
Port 80 –
bit 4
Port 80 –
bit 3
Port 80 –
bit 2
Port 80 –
Bit 1
Port 80 –
bit 0
5.7 Security Kit
Functional Block Diagram