User's Manual
Table Of Contents
- Introduction
- Modules RF band support
- Features
- Module Connection Interface
- Environmental Specifications and Certifications
- Environmental Specifications
- Certifications
- Green Product Compliance
- Pin Definitions
- LGA Module Pin Diagram
- LGA Module Pin Definitions
- Electrical Specifications
- Power supply
- Power consumption
- I/O Interface
- USB interface
- UIM interface
- Control interface
- Power-on/ WAKEUP_IN Signal
- WAKEUP_OUT interface
- Reset Signal
- SPI Master Interface
- PCM Interface
- I2S Interface
- I2C Interface
- UART Interface
- ADC Interface
- RF Specifications
- Band support
- Bandwidth support
- RF Transmit Specification
- RF Receiver Specification
- GNSS Receiver Specification
- Software Interface
- Support tools
- USB interface
- Mechanical
- PCBA Form Factor
- Design Guide
- Power supply
- Thermal design
- USB design
- RF connection
- Interference and sensitivity
- GNSS external circuit design
- Reflow
- PCB pad design
- Stencil
- Antenna design requirement
- Labeling and Packaging
- Labeling
- Packing
- MSL level
- Safety Recommendation
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Product Technical Specifications
□ Normal □ Internal Use Confidential □ Restricted Confidential
POWER_ON pad will enable the module after VCC is applied.
Figure 4. Power ON/OFF timing
After module power on, it also can wakeup the module in PSM deep sleep mode if host
want to transmit data.
WAKEUP_IN description: (Host: Output, Modem: Input)
– HIGH:
Host does not require the modem (allowing it to enter PSM deep-sleep mode).
– LOW:
If the modem is in PSM deep-sleep mode, set this pin to low level will wakeup the modem.
3.6.2. WAKEUP_OUT interface
"WAKEUP_OUT" (Host: Input, Modem: Output):
– LOW: The modem is power off or in PSM deep-sleep mode.
– HIGH: The modem is normal/eDRX /DRX mode and other status.
3.6.3. Reset Signal
T he Reset Signal is a hardware reset signal to control the system reset directly. You can
connect it to a key or a control signal. A low pulse(3s<tlow<4s) after power on will reset the