Product Specs

4
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Subject: Doc. No.: Rev: 2
UMC-STD31LF Product Specification Page 41 of 54
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The information contained herein is the exclusive property of WNC and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission from WNC.
Form No.: 2-JT-00022-03_001
UMC-STD31LF Product Specification
41
8 Design application notes
This section describes how to connect UMC-STD31LF NAD to the circuitry on the application board, and
notes that system developers should pay attention to in their design stage
8.1 Power trace
On VSYS power traces from the application board to UMC-STD31LF, to place the de-coupling capacitors,
10-uF or 22-uF, near by the input of NAD as close as possible. Recommended width of VSYS trace is at least
wider than 80-mil
8.2 Power ON/OFF and Reset
8.2.1 Power ON
After supplying VSYS, to pull PMIC_ENB LOW to power NAD on
8.2.2 Power OFF
When NAD is working under the operation mode, pull PMIC_ENB HIGH to power NAD off. Powering off
sequence requires at least 140-ms
8.2.3 Reset
(1) To pull PMIC_RESET_B LOW at least 200-ms for rebooting NAD the with completed power sequence
(2) Alternative approach is pulling SYSRSTB LOW to reset NAD without resetting the power ON/OFF
sequence. This is only for the debugging
NAD
Pad#
NAD Pad Name
Pin Function Description
SYSRSTB
t0 >0
VSYS
OFF
On Sequence
Operation mode
PMIC Power off sequence
OFF
t4 < 140ms
Run Linux
PMIC_ENB
(Internal pull Up)
NAD Power On/Off Sequence
t1 = 200 ms
t3 < 20ms
WATCHDOG
2ms
1ms