Data Sheet

Data Sheet
©2013
Würth Elektronik eiSos GmbH & Co. KG - REV 0.2
PRELIMINARY
12/ 25
171050601/WPMDM1500602J
MagI³C Power Module Product Family
VDRM - Variable Step Down Regulator Module
J CIRCUIT DESCRIPTION


 





Whereas the falling threshold level can be calculated using:




 



 

R
ENT
R
ENH
R
ENB
V
IN
EN
2MΩ
5.1V
RUN
1.279V
5V INT
21µA
Figure 1. Enable input detail
Step 2. Select Output Voltage (V
OUT
)
Output voltage is determined by a divider of two resistors connected between V
OUT
and ground. The midpoint of the
divider is connected to the FB input.
The ratio of the feedback resistors for a desired output voltage is:








  
(2)
These resistors should be chosen from values in the range of 1kΩ to 10kΩ.
For V
OUT
= 0.8V the FB pin can be connected to the output directly and R
FBB
can be set to 8.06kΩ to provide
minimum output load. A table of values for R
FBT
and R
FBB
, is included in the applications circuit.
Step 3. Select Soft-Start Capacitor (C
SS
)
Programmable soft-start permits the regulator to slowly ramp to its steady state operating point after being enabled,
thereby reducing current inrush from the input supply and slowing the output voltage rise-time to prevent overshoot.
Upon turn-on, after all UVLO conditions have been passed, an internal 1.6ms circuit slowly ramps the SS/TRK input
to implement internal soft start. If 2ms is an adequate turnon time then the Css capacitor can be left unpopulated.
Longer soft-start periods are achieved by adding an external capacitor to this input.
Soft start duration is given by the formula:





(3)
with t
ss
= select soft-start time in (ms)
Using a 0.22μF capacitor results in 3.5ms typical soft-start duration; and 0.47μF results in 7.5ms typical. 0.47μF is a
recommended initial value. As the soft-start input exceeds 0.796V the output of the power stage will be in regulation
and the 50μA current is deactivated. Note that the following conditions will reset the soft-start capacitor by
discharging the SS input to ground with an internal current sink.
The enable input being “pulled low”