ML501 Reference Design User Guide UG227 (v1.
R Xilinx is disclosing this Document and Intellectual Property (hereinafter “the Design”) to you for use in the development of designs to operate on, or interface with Xilinx FPGAs. Except as stated herein, none of the Design may be copied, reproduced, distributed, republished, downloaded, displayed, posted, or transmitted in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise, without the prior written consent of Xilinx.
Table of Contents Preface: About This Guide Additional Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Additional Support Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Typographical Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Online Document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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R Preface About This Guide This user guide introduces several designs that demonstrate the Virtex™-5 LX device features using the using the ML501 Evaluation Platform. Additional Documentation The following documents are also available for download at http://www.xilinx.com/virtex5. • Virtex-5 Family Overview The features and product selection of the Virtex-5 family are outlined in this overview.
R Preface: About This Guide Typographical Conventions This document uses the following typographical conventions. An example illustrates each convention. Convention Meaning or Use References to other documents See the Virtex-5 Configuration Guide for more information. Emphasis in text The address (F) is asserted after clock event 2. Indicates a link to a web page. http://www.xilinx.
R ML501 Reference Design Introduction The Virtex-5 family of FPGAs [Ref 1] offers designers multiple platforms with an optimized balance of high-performance logic, serial connectivity, signal processing, and embedded processing resources. All members of the Virtex-5 family are built using the second generation Advanced Silicon Modular Block (ASMBL™) technology and a state-ofthe-art 65 nm copper process to produce the industry's highest performance FPGAs.
R Reference Designs Reference Designs Base System Builder The BSB wizard helps designers quickly create a working embedded system using a pointand-click GUI to select a Xilinx processor and an associated set of desired peripherals. BSB generated designs for the ML501 are available at: • http://www.xilinx.com/products/boards/ml501/reference_designs.
R Reference Designs EDK Design This ML501 reference design utilizes the Embedded Development Kit (EDK) to create an embedded processing system using the MicroBlaze processor and the extensive set of peripherals offered through the EDK IP catalog. The ML501 EDK reference design contains a complete EDK project that can be used to explore the features of the ML501 platforms. The Overview and Setup presentation shows how to set up the design and the test environment.
R Reference Designs Stand-Alone Software Applications Software applications (Table 1) that run on the EDK hardware reference design can be compiled within EDK and downloaded to the ML501 with a JTAG download cable for verification. A set of pre-built ELF and ACE files as well as a readme.txt file explaining how to run each of the applications for the ML501 are available at: • http://www.xilinx.com/products/boards/ml501/reference_designs.
R Reference Designs Table 1: Demonstration Software Applications (Continued) Name Description ps2_scancodes_polled.elf ps2_scancodes_polled.ace ps2_scancodes_polled_readme.txt Shows the scancodes from devices attached to the PS/2 input ports. simon.elf simon.ace simon_readme.txt Interactive game using N, E, S, W buttons and LEDs as well as the LCD panel. slideshow.elf slideshow.ace slides.zip slideshow_readme.
R References References Documents supporting Virtex-5 devices and the ML501 Evaluation Platform are: 1. DS100, Virtex-5 Family Overview: LX, LXT, and SXT Platforms. 2. UG228, ML501 Getting Started Tutorial. 3. UG226, ML501 Evaluation Platform User Guide. 4. UG111, Embedded System Tools Reference Manual, EDK 9.1i. 5. UG191, Virtex-5 FPGA Configuration User Guide. 6. UG029, ChipScope Pro Software and Cores User Guide. 12 www.xilinx.com ML501 Reference Design UG227 (v1.
