MicroBlaze Processor Reference Guide www.xilinx.com 109
UG081 (v6.0) June 1, 2006 1-800-255-7778
Instructions
R
lbu
Load Byte Unsigned
Description
Loads a byte (8 bits) from the memory location that results from adding the contents of
registers rA and rB. The data is placed in the least significant byte of register rD and the
other three bytes in rD are cleared.
Pseudocode
Addr ←(rA) + (rB)
(rD)[24:31]
Mem(Addr)
(rD)[0:23]
0
Registers Altered
rD
Latency
1 cycle
lbu rD, rA, rB
1 1 0 0 0 0 rD rA rB 0 0 0 0 0 0 0 0 0 0 0
0 6 11 16 21 31