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110 www.xilinx.com MicroBlaze Processor Reference Guide
1-800-255-7778 UG081 (v6.0) June 1, 2006
Chapter 4: MicroBlaze Instruction Set Architecture
R
lbui
Load Byte Unsigned Immediate
Description
Loads a byte (8 bits) from the memory location that results from adding the contents of
register rA with the value in IMM, sign-extended to 32 bits. The data is placed in the least
significant byte of register rD and the other three bytes in rD are cleared.
Pseudocode
Addr ←(rA) + sext(IMM)
(rD)[24:31]
← Mem(Addr)
(rD)[0:23]
← 0
Registers Altered
• rD
Latency
1 cycle
Note
By default, Type BInstructionswill take the16-bit IMM fieldvalue and sign extendit to 32
bits to use as the immediate operand. This behavior can be overridden by preceding the
Type B instruction with an imm instruction. See the imm instruction for details on using
32-bit immediate values.
lbui rD, rA, IMM
1 1 1 0 0 0 rD rA IMM
0 6 11 16 31