MicroBlaze Processor Reference Guide www.xilinx.com 119
UG081 (v6.0) June 1, 2006 1-800-255-7778
Instructions
R
mul
Multiply
Description
Multiplies the contentsof registers rA andrB andputs the result in register rD. Thisis a 32-
bit by 32-bit multiplication that will produce a 64-bit result. The least significant word of
this value is placed in rD. The most significant word is discarded.
Pseudocode
(rD) LSW( (rA) × (rB) )
Registers Altered
rD
Latency
1 cycle
Note
This instruction is only valid if the target architecture has multiplier primitives, and if
present, the MicroBlaze parameter C_USE_HW_MUL is set to 1.
mul rD, rA, rB
0 1 0 0 0 0 rD rA rB 0 0 0 0 0 0 0 0 0 0 0
0 6 11 16 21 31