126 www.xilinx.com MicroBlaze Processor Reference Guide
1-800-255-7778 UG081 (v6.0) June 1, 2006
Chapter 4: MicroBlaze Instruction Set Architecture
R
put
put to fsl interface
Description
MicroBlaze will write the value from register rA to the FSLx interface.
The put instruction has four variants.
The blockingversions (when‘n’ is‘0’) will stall microblaze untilthere is space availablein
the FSL interface. The non-blocking versions will not stall microblaze and will set carry to
‘0’ if space was available and to ‘1’ if no space was available.
Theput andnput instructions will setthe controlbit tothe FSLinterface to‘0’ andthe cput
and ncput instruction will set the control bit to ‘1’.
Pseudocode
(FSLx) (rA)
if (n = 1) then
MSR[Carry] (FSLx Full bit)
(FSLx Control bit) C
Registers Altered
MSR[Carry]
Latency
2cycles. For blockingaccesses, MicroBlazewill first stalluntil space isavailable onthe FSL
interface.
put
rA, FSLx put data to FSL x (blocking)
nput
rA, FSLx put data to FSL x (non-blocking)
cput
rA, FSLx put control to FSL x (blocking)
ncput
rA, FSLx put control to FSL x (non-blocking)
0 1 1 0 1 1 0 0 0 0 0 rA 1 n c 0 0 0 0 0 0 0 0 0 0 FSLx
0 6 11 16 29 31