130 www.xilinx.com MicroBlaze Processor Reference Guide
1-800-255-7778 UG081 (v6.0) June 1, 2006
Chapter 4: MicroBlaze Instruction Set Architecture
R
rtid
Return from Interrupt
rn from Interrupt
Description
Return from interrupt will branch to the location specified by the contents of rA plus the
IMM field, sign-extended to 32 bits. It will also enable interrupts after execution.
This instruction always has a delay slot. The instruction following the RTID is always
executed before the branch target. That delay slot instruction has interrupts disabled.
Pseudocode
PC (rA) + sext(IMM)
allow following instruction to complete execution
MSR[IE] 1
Registers Altered
PC
MSR[IE]
Latency
2 cycles
Note
Convention is to use general purpose register r14 as rA.
A delay slot must not be used by the following: IMM, branch, or break instructions. This
also applies to instructions causing recoverable exceptions (e.g. unalignement), when
hardware exceptions are enabled. Interrupts and external hardware breaks are deferred
until after the delay slot branch has been completed.
rtid rA, IMM
1 0 1 1 0 1 1 0 0 0 1 rA IMM
0 6 11 16 31