144 www.xilinx.com MicroBlaze Processor Reference Guide
1-800-255-7778 UG081 (v6.0) June 1, 2006
Chapter 4: MicroBlaze Instruction Set Architecture
R
wdc
Write to Data Cache
Description
Write into the data cache tag. The register rB value is not used. Register rA contains the
instruction address. Bit 30 in rA is the new valid bit.
The WDC instruction should only be used when the data cache is disabled (i.e.
MSR[DCE]=0).
Pseudocode
(DCache Tag) (rA)
Registers Altered
None
Latency
1 cycle
wdc rA,rB
1 0 0 1 0 0 0 0 0 0 0 rA rB 0 0 0 0 1 1 0 0 1 0 0
0 6 11 16 31