MicroBlaze Processor Reference Guide www.xilinx.com 145
UG081 (v6.0) June 1, 2006 1-800-255-7778
Instructions
R
wic
Write to Instruction Cache
Description
Write into the instruction cache tag.The register rB value isnot used. RegisterrA contains
the instruction address. Bit 30 in rA is the new valid bit.
The WIC instruction should only be used when the instruction cache is disabled (i.e.
MSR[ICE]=0).
Pseudocode
(ICache Tag) (rA)
Registers Altered
None
Latency
1 cycle
wic rA,rB
1 0 0 1 0 0 0 0 0 0 0 rA rB 0 0 0 0 1 1 0 1 0 0 0
0 6 11 16 31