MicroBlaze Processor Reference Guide www.xilinx.com 147
UG081 (v6.0) June 1, 2006 1-800-255-7778
Instructions
R
xori
Logical Exclusive OR with Immediate
Description
The IMM field is extended to 32 bits by concatenating 16 0-bits on the left. The contents of
register rA are XORed with the extended IMM field; the result is placed into register rD.
Pseudocode
(rD) (rA) sext(IMM)
Registers Altered
rD
Latency
1 cycle
Note
By default, Type BInstructionswill take the16-bit IMM fieldvalue and sign extendit to 32
bits to use as the immediate operand. This behavior can be overridden by preceding the
Type B instruction with an imm instruction. See the imm instruction for details on using
32-bit immediate values.
xori rA, rD, IMM
1 0 1 0 1 0 rD rA IMM
0 6 11 16 31