user manual
42 www.xilinx.com MicroBlaze Processor Reference Guide
1-800-255-7778 UG081 (v6.0) June 1, 2006
Chapter 1: MicroBlaze Architecture
R
Comparison
The FPU implements the following floating point comparisons:
• compare less-than, fcmp.lt
• compare equal, fcmp.eq
• compare less-or-equal, fcmp.le
• compare greater-than, fcmp.gt
• compare not-equal, fcmp.ne
• compare greater-or-equal, fcmp.ge
• compare unordered, fcmp.un (used for NaN)
Exceptions
The floating point unit uses the regular hardware exception mechanism in MicroBlaze.
When enabled, exceptions are thrown for all the IEEE standard conditions: underflow,
overflow, divide-by-zero, and illegal operation, as well as for the MicroBlaze specific
exception: denormalized operand error.
Afloatingpointexceptionwill inhibit the write to the destination register(Rd).Thisallows
a floating point exception handler to operate on the uncorrupted register file.
Fast Simplex Link (FSL)
MicroBlaze can be configured with up to eight Fast Simplex Link (FSL) interfaces, each
consisting of one input and one output port. The FSL channels are dedicated uni-
directional point-to-point data streaming interfaces. For detailed information on the FSL
interface, please refer to the FSL Bus data sheet (DS449).
The FSL interfaces on MicroBlaze are 32 bits wide. A separate bit indicates whether the
sent/receivedwordis of controlor datatype. Theget instruction inthe MicroBlaze ISA is
used to transfer information from an FSL port to a general purpose register. The put
instruction is used to transfer data in the opposite direction. Both instructions come in 4
flavours:blockingdata,non-blockingdata,blockingcontrol,andnon-blockingcontrol.For
a detailed description of the get and put instructions please refer to Chapter 4,
“MicroBlaze Instruction Set Architecture”.
Hardware Acceleration using FSL
Each FSL provides a low latency dedicated interface to the processor pipeline. Thus they
areidealforextendingtheprocessorsexecution unitwithcustomhardwareaccelerators.A
simple example is illustrated in Figure 1-12.