72 www.xilinx.com MicroBlaze Processor Reference Guide
1-800-255-7778 UG081 (v6.0) June 1, 2006
Chapter 4: MicroBlaze Instruction Set Architecture
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Formats
MicroBlaze uses two instruction formats: Type A and Type B.
Type A
TypeAisusedforregister-registerinstructions.Itcontainstheopcode,onedestinationand
two source registers.
Type B
Type B is used for register-immediate instructions. It contains the opcode, one destination
and one source registers, and a source 16-bit immediate value.
Instructions
MicroBlazeinstructionsaredescribednext.Instructionsarelistedinalphabeticalorder.For
each instruction Xilinx provides the mnemonic, encoding, a description of it, pseudocode
of its semantics, and a list of registers that it modifies.
Mem(x) Memory location at address x
FSLx FSL interface x
LSW(x) Least Significant Word of x
isDnz(x) Floating point: true if x is denormalized
isInfinite(x) Floating point: true if x is + or -
isPosInfinite(x) Floating point: true if x is +
isNegInfinite(x) Floating point: true if x -
isNaN(x) Floating point: true if x is a quiet or signalling NaN
isZero(x) Floating point: true if x is +0 or -0
isQuietNaN(x) Floating point: true if x is a quiet NaN
isSigNaN(x) Floating point: true if x is a signaling NaN
signZero(x) Floating point: return +0 for x > 0, and -0 if x < 0
signInfinite(x) Floating point: return + for x > 0, and - if x < 0
Table 4-1: Symbol notation
Symbol Meaning
Opcode Destination Reg Source Reg A Source Reg B 0 0 0 0 0 0 0 0 0 0 0
0 6 11 16 21 31
Opcode Destination Reg Source Reg A Immediate Value
0 6 11 16 31