Inc. Portable Generator User Manual

Memory 107

Xilinx Blocks

• Store Only Valid Data: when checked, the block will not store any invalid

data words; i.e., when the din sample is invalid, the WE (write enable) input is

disregarded (if 1) and the sample is not written into the FIFO.

• Zero Initial Output: when checked, initial output from the block is 0.

Otherwise, it is NaN (not a number).

• Memory Type: speciﬁes the implementation that must be used either for

distributed or block RAM.

Other parameters used by this block aredescribed inthe CommonParameters section

of the previous chapter.

Xilinx LogiCORE

The block always uses the Xilinx LogiCORE: Synchronous FIFO V3.0. The core

datasheet can be found on your local disk at:

%XILINX%\coregen\ip\xilinx\eip1\com\xilinx\ip\sync_fifo_v3_0\d

oc\sync_fifo.pdf

ROM

The Xilinx ROM block is a single port read-only memory (ROM).

Values are storedby word and all words havethe samearithmetic type,

width, and binary point position. Each word is associated with exactly

oneaddress.An address canbeany unsignedﬁxedpoint integerfrom0

to d-1, where d denotes the ROM depth (number of words). The

memory contents are speciﬁed through a block parameter. The block

has one input port for the memory address and one output port for data out. The

address port must be an unsigned ﬁxed point integer. The block has two possible

Xilinx LogiCORE implementations, using either distributed or block memory.