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102 www.xilinx.com MicroBlaze Processor Reference Guide
1-800-255-7778 UG081 (v6.0) June 1, 2006
Chapter 4: MicroBlaze Instruction Set Architecture
R
fmul
Floating Point Arithmetic Multiplication
Description
The floating point value in rA is multiplied with the floating point value in rB and the
result is placed into register rD.
Pseudocode
if isDnz(rA) or isDnz(rB) then
(rD) ← 0xFFC00000
FSR[DO] ← 1
ESR[EC] ← 00110
else
if isSigNaN(rA) or isSigNaN(rB) or (isZero(rA) and isInfinite(rB)) or
(isZero(rB) and isInfinite(rA)) then
(rD) ← 0xFFC00000
FSR[IO] ← 1
ESR[EC] ← 00110
else
if isQuietNaN(rA) or isQuietNaN(rB) then
(rD) ← 0xFFC00000
else
if isDnz((rB)*(rA)) then
(rD) ← signZero((rA)*(rB))
FSR[UF] ← 1
ESR[EC] ← 00110
else
if isNaN((rB)*(rA)) and then
(rD) ← signInfinite((rB)*(rA))
FSR[OF] ← 1
ESR[EC] ← 00110
else
(rD) ← (rB) * (rA)
Registers Altered
• rD, unless an FP exception is generated, in which case the register is unchanged
• ESR[EC]
• FSR[IO,UF,OF,DO]
Latency
4 cycles
Note
This instruction is only available when the MicroBlaze parameter C_USE_FPU is set to 1.
fmul
rD, rA, rB Multiply
0 1 0 1 1 0 rD rA rB 0 0 1 0 0 0 0 0 0 0 0
0 6 11 16 21 31