Specifications

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警告语

Full Bluetooth 5 ready multi-protocol SoC Module

Embedded Cortex™ M4F 32 bit processor

Support Bluetooth 5

The PTR9818 ultra-low power Bluetooth 5 ready multiprotocol System on Module based on

the nRF52840 from Nordic Semiconductor. The module with an ARM® Cortex™ M4F 32 bit

processor, 1MB Flash/256KB RAM, embedded 2.4GHz transceiver, and integrated

antenna, provide a complete solution with no additional RF design, Bluetooth 5 ,

allowing faster time to market, while simplifying designs, reducing BOM costs, also

reduce the burden of Regulatory approvals to enter the world market. Making you

more quickly into the Bluetooth smart application and remove the worries.

It has an ARM® TrustZone® CryptoCell-310 co-processor for implementation of IoT

security.

Features

PTR9818

 Nordic nRF52840 with ARM Cortex M4F

 Multiprotocol support :

Bluetooth 5

 Bluetooth 5: 2 Mbps, 1 Mbps, 500 kbps, 125

kbps

 Integrated DC-DC converter

 Serial Wire Debug (SWD)

 Nordic SoftDevice Ready

 Over-the-Air (OTA) firmware update

 Flash/RAM: 1MB/256KB.

 48 General purpose I/O pins

 15 level low-power comparator with wake-up

from System OFF mode

 Two 2-wire Master/Slave (I2C compatible)

 I2S audio interface



12 bit/200KSPS ADC

 1 QSPI (32Mbps)

 4 SPI Master/ 3 SPI Slave (8Mbps)

 2 UART (with CTS/RTS and DMA)

 4x 4-channel PWM unit with EasyDMA

 USB 2.0 full speed (12 Mbps) controller

 20 channel CPU independent Programmable

Peripheral Interconnect (PPI).

 Quadrature Demodulator (QDEC)

 128-bit AES HW encryption

 5 x 32 bits, 3 x 24 bits Real Time Counters (RTC)

 NFC-A tag interface for OOB pairing

 TX power: +8dBm to-20dBm in 4 dB steps.

 Sizes: 22.7x17.5 x1.8mm with Antenna

 Integrated high performance PCB antenna

 DC/DC on board

 No external components required

 Operation voltage: 1.7V to 5.5V

http://www.freqchina.com

Summary of content (12 pages)

PAGE 1
PTR9818 Full Bluetooth 5 ready multi-protocol SoC Module Embedded Cortex™ M4F 32 bit processor Support Bluetooth 5 Features    12 bit/200KSPS ADC  1 QSPI (32Mbps)  4 SPI Master/ 3 SPI Slave (8Mbps)  2 UART (with CTS/RTS and DMA)  4x 4-channel PWM unit with EasyDMA  USB 2.0 full speed (12 Mbps) controller  20 channel CPU independent Programmable Peripheral Interconnect (PPI).
PAGE 2
Multi-protocol Bluetooth 5.0 Security AES-128 .c na ww .f Version re Quick Specifications: Radio hi          - 2.
PAGE 4
Pin Name Description Recommend usage P0.09/NFC1 Digital I/O/ NFC input Standard drive, low frequency I/O Pin2 P0.10/NFC2 Digital I/O/ NFC input Standard drive, low frequency I/O Pin3 P0.18/RESET Digital I/O/RESET QSPI/CSN/RESET Pin4 P1.02 Digital I/O Pin5 SWDCLK HW debug and programming Pin6 SWDIO HW debug and programming Pin7 P1.00 Digital I/O Pin8 P0.24 Digital I/O QSPI Pin9 P0.22 Digital I/O QSPI Pin10 P0.20 Digital I/O Pin11 P0.17 Digital I/O Pin12 P0.
PAGE 5
Pin44 D- USB D- USB Pin45 D+ USB D+ USB Pin46 VDDH High voltage power supply Pin47 P0.23 Digital I/O Pin48 P0.11 Digital I/O Pin49 P1.08 Digital I/O Pin50 P0.07 Digital I/O Pin51 P0.27 Digital I/O Pin52 P0.05/AIN3 Digital I/O/Analog input 3 Pin53 P0.30/AIN6 Digital I/O/Analog input 6 Standard drive, low frequency I/O Pin54 P0.28/AIN4 Digital I/O/Analog input 4 Standard drive, low frequency I/O Pin55 P1.11 Digital I/O Pin56 P1.12 Digital I/O co m QSPI a.
PAGE 6
Pin Flash Program interface SWDIO Debug and flash programming I/O SWDCLK Debug and flash programming I/O This is the hardware debug and flash programming of module, J-Link Lite support, please refer www.segger.com. Reference circuitry: ht tp :/ / ww w .f re q ch in a. co m In this section there are 5 reference circuits to show how to design an application circuit with this module. Reference Circuit configuration 1 Config no. Config.
PAGE 7
ch in a. co m Reference Circuit configuration 2 Configurations summary for reference circuit 2 VDD Battery/Ext.regulator EXT Supply Output USB Yes No N/A .f Config.2 VDDH re q Main Supply Config no. Explanation of symbols in reference circuit 2 schematic Symbol Parameter Min. Typ. Max. Units 3.7 5.5 V Main supply voltage in high voltage mode 2.5 VEXT Voltage output on VDD when supplied from internal regulator (REG0). VDDH is the input to REG0. 1.8 3.
PAGE 8
Configurations summary for reference circuit 3 Main Supply Config no. Config.3 VDDH VDD N/A Battery/Ext.regulator EXT Supply Output USB No Yes Explanation of symbols in reference circuit 3 schematic Symbol Parameter Min. Typ. Max. Units Main supply voltage in normal voltage mode 1.7 3 3.6 V VBUS Supply voltage on VBUS pin 4.35 5 5.5 V a. co m VDD ht tp :/ / ww w .f re q ch in Reference Circuit configuration 4 Config no. Config.
PAGE 9
re q ch in a. co m Reference Circuit configuration 5 Configurations summary for reference circuit 5 VDDH USB(VDDH = VBUS) VDD EXT Supply Output USB Yes Yes N/A ww w Config.5 .f Main Supply Config no. Explanation of symbols in reference circuit 5 schematic Symbol Parameter Min. Typ. Max. Units 5 5.5 V Supply voltage on VBUS pin 4.35 VEXT Voltage output on VDD when supplied from internal regulator (REG0). VBUS is the input to REG0. 1.8 3.
PAGE 10
  When the power is supplied to VDDH, the output from the VDD pin could be used to supply external circuitry. The feature must be configured in the EXTSUPLLY and REGOUT0 UICR registers. In the reference circuitry, External supply is annotated with the VEXT net name. When using the USB peripheral, a 5V USB supply needs to be provided on the VBUS pin. Recommended RF Layout & Ground Plane: ww w .f re q ch in a.
PAGE 11
Ordering Information: Part Number Description PTR9818 Bluetooth Low Energy System on Module PTR9818-EVB Evaluation boards for module，with key, LED, I/O extend，sock for coin cell battery. Max. Unit -0.3 -0.3 -0.3 -40 3.9 3.9 VCC + 0.3V 125 co Min. V V V °C in VCC_MAX VIO_MAX VIO_MAX TS Parameter Voltage on supply pin Voltage on GPIO pins (VCC > 3.6V) Voltage on GPIO pins (VCC ≤ 3.6V) Storage Temperature Range a.
PAGE 12
FCC Statement FCC standards: FCC CFR Title 47 Part 15 Subpart C Section 15.247 Integral antenna with antenna gain 0dBi This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation.