Service manual

AI8
14
IC BLOCK DIAGRAM
HD74LVU04AFPEL (XY102A00)
Hex Inverter
IFC2: IC106
HD74LV04AFPEL (IS000400)
Hex Inverter
IFC2: IC309, 411, 412
UNC: IC105
HD74LV08AFPEL (IS000800)
Quad 2 Input AND
IFC2: IC107, 108, 410
UNC: IC104, 213
TC74VHCT74AF(EL) (XZ226A00)
Dual D-Type Flip-Flop
IFC2: IC602
SN74LV138ANSR (IS013810)
3 to 8 Demultiplexer
UNC: IC211, 212
TC74VHCT245AF (XV242A00)
TC74VHC245F (XT487A00)
Octal 3-State Bus Transceiver
IPC1: IC106
IFC2: IC101-105, 501-504, 701-712
UNC: IC102, 204-210
HD74LV273AFPEL (IS027300)
Octal D-Type Flir Flop
IFC2: IC603, 604
AM26LS31CNSR (XU996A00)
Quad Line Driver
IPC1: IC100, 102-105
DS26C32ATMX (XU815A00)
Quad Differential Line Receiver
IPC1: IC101
1
2
3
4
5
6
7
1A
1Y
2A
2Y
3A
3Y
Vss
14
13
12
11
10
9
8
VDD
6A
6Y
5A
5Y
4A
4Y
1
2
3
4
5
6
7
1A
1Y
2A
2Y
3A
3Y
Vss
14
13
12
11
10
9
8
VDD
6A
6Y
5A
5Y
4A
4Y
1
2
3
1A
1Y
42A
52B
62Y
7
VSS
1B
14
13
12
VDD
4A
11 4Y
10 3B
9 3A
8 3Y
4B
INPUTS OUTPUTS
PR CLR CLK D Q Q
L
H
H
L
H
Q
O
H
L
H
H
L
Q
O
X
X
X
H
L
X
X
X
X
f
f
L
H
L
L
H
H
H
L
H
L
H
H
H
1
2
3
4
5
6
7
1CLR
1D
1CK
1PR
1Q
1Q
GND
14
13
12
11
10
9
8
VCC
2CLR
CLR
2D
D
2CK
CK
2PRPR
2Q
2Q
Q
Q
CLR
D
CK
PR
Q
Q
1
2
3
4
5
6
7
A
A
Select
Enable
Output
Output
B
B
C
C
G2A
G2A
G2B
G2B
G1
G1
Y7
Y7 Y5
Y4
Y3
Y2
Y1
Y0
Y6
16
15
14
13
12
11
10
Vcc
YO
Y1
Y2
Y3
Y4
Y5
8
GND
9
Y6
1
2
3
4
5
6
7
20
19
18
17
16
15
14
Vcc
G
B1
B2
B3
B4
B5
B6
B7
B8
8
9
10
12
11
GND
A8
A7
A6
A5
A4
A3
A2
A1
D1R
13
CLEAR
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
VCC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
CLOCK
1 20
2 19
3 18
4 17
5 16
6 15
7 14
8 13
9 12
10 11
Q
DCK
CL
D
Q
CK
CL
Q
DCK
CL
D
Q
CK
CL
D
Q
CK
CL
Q
DCK
CL
D
Q
CK
CL
Q
DCK
CL
1
2
3
4
5
6
7
1A
1Y
1Z
2Z
2Y
2A
GND
ENABLE G
16
15
14
13
12
11
Vcc
4A
4Y
4Z
ENABLE G
3Z
3Y
8
9
10
3A
H= high level
L= low level
X= irrelevant
Z= high impedance (off)
OUTPUTSENABLESINPUT
A
GGY Z
H
H
X
X
L
X
X
L
L
H
H
L
H
L
Z
L
H
L
H
Z
H
L
H
L
X
1
2
3
4
5
6
7
INPUT A
INPUT A
OUTPUT A
OUTPUT C
INPUT C
INPUT C
GND
ENABLE
16
15
14
13
12
11
Vcc
INPUT B
INPUT B
OUTPUT B
ENABLE
OUTPUT D
INPUT D
8
9
10
INPUT D
+
-
-
+
+
-
-
+