Specifications

45
RX-V550/HTR-5750
RX-V450/HTR-5740/DSP-AX450
IC5 : YSS948 (DSP P.C.B.)
DSP (Main Decoder)
IC5 : YSS948 (DSP P.C.B.)
DSP (Main Decoder)
Power supply 9 VDD1 – – Power supply terminal for terminal block circuit (Typ. 3.3V)
33
45
60
85
100
121
136
5 VDD2 – – Power supply terminal for internal circuit (Typ. 1.2V)
6
15
22
23
36
50
51
63
64
70
71
79
80
88
89
95
107
108
119
120
127
128
137
138
142 AVDDR – – Power supply terminal 1 for PLL section (Typ. 3.3V)
Insert a 0.1µF capacitor between AVDDR terminal and AVSSR terminal.
143 AHVDD – – Power supply terminal 2 for PLL section (Typ. 3.3V)
Insert a 0.1µF capacitor between AHVDD terminal and AHVSS terminal.
144 AHVDDG – – Power supply terminal 3 for PLL section (Typ. 3.3V)
Insert a 0.1µF capacitor between AHVDDG terminal and AHVSSG terminal.
4 DVDD – – Internal power supply terminal for PLL section (Typ. 1.2V)
Insert a 0.1µF capacitor between DVDD terminal and DVSS terminal.
7 VSS – – Ground terminal
8
14
20
21
35
41
42
48
49
61
62
69
77
78
86
87
93
94
105
106
117
118
123
129
130
139
140
Power supply 1 AHVSS Ground terminal 2 for PLL section
Insert a 0.1µF capacitor between AHVDD terminal and AHVSS terminal.
2 AHVSSG Ground terminal 3 for PLL section
Insert a 0.1µF capacitor between AHVDDG terminal and AHVSSG terminal.
3 DVSS Ground terminal 4 for PLL section
Insert a 0.1µF capacitor between DVDD terminal and DVSS terminal.
141 AVSSR Ground terminal 1 for PLL section
Insert a 0.1µF capacitor between AVDDR terminal and AVSSR terminal.
Initial clear 131 nIC Is – Hardware reset input terminal
The device is initialized at “L” level.
Clock 18 XI I – Clock input terminal
Connect 12.288MHz crystal oscillator as shown in circuit example (Note 2).
When not connecting crystal oscillator, input 12.28MHz clock to XI terminal.
19 XO O – Clock output terminal for crystal oscillator oscillation
Connect as shown in circuit example (Note 2).
When inputting clock directly to XI terminal without connecting crystal oscillator,
do not connect anything to XO terminal. Do not use XO terminal for any purpose
other than clock oscillation.
Microprocessor 126 nMICS Is – Chip select input terminal for microprocessor interface. Input of MISCK and
interface MISI terminals becomes effective at “L” level.
125 MISCK Is – Clock input terminal for microprocessor interface
124 MISI I – Address, read/write control and data input terminal for microprocessor interface
122 MISO Ot 4mA Data output terminal for microprocessor interface
Audio interface 32 SDIMCK Is – Master clock input terminal on input side of audio interface
Master clock from DIR, ADC, etc. is inputted. Maximum frequency for input is
25MHz.
(512fs up to 48kHz of input sampling frequency, 256fs up to 96kHz and 128fs up
to 192kHz)
31 SDIBCK Is – Bit clock input/output terminal on input side of audio interface.
64fs bit clock is inputted.
30 SDIWCK I – Word clock terminal on input side of audio interface.
26 SDI3 I – Serial data input terminal 3 for input side of audio interface
Connect to ground when not using this terminal.
27 SDI2 I – Serial data input terminal 2 for audio interface
Connect to ground when not using this terminal.
28 SDI1 I – Serial data input terminal 1 for audio interface
Connect to ground when not using this terminal.
29 SDI0 I – Serial data input terminal 0 for audio interface
Enter digital audio data (various streams/PCM) coming through IEC60958to this
terminal .
38 SDOMCK Ot 8mA Master clock output terminal on output side of audio interface.
Master clock to DIT, DAC is output from this terminal
Maximum frequency to be output is 25MHz.
34 SDOBCK Is/O 4mA Bit clock input/output terminal on output side of audio interface.
64fs bit clock is inputted or output.
37 SDOWCK I/O 4mA Word clock terminal on output side of audio interface.
44 SDO3 O 4mA Serial data output terminal 3 for audio interface.
43 SDO2 O 4mA Serial data output terminal 2 for audio interface.
40 SDO1 O 4mA Serial data output terminal 1 for audio interface.
39 SDO0 O 4mA Serial data output terminal 0 for audio interface.
External 112 MEMA18 O 4mA External memory address output terminal 18 to 0
memory 58 MEMA17
interface 73 MEMA16
72 MEMA15
74 MEMA14
59 MEMA13
75 MEMA12
67 MEMA11
110 MEMA10
66 MEMA9
65 MEMA8
76 MEMA7
81 MEMA6
82 MEMA5
83 MEMA4
84 MEMA3
90 MEMA2
91 MEMA1
92 MEMA0
Category Pin No.
Terminal I/O Output
Function
name Note 1) current
Category Pin No.
Terminal I/O Output
Function
name Note 1) current