Service manual

SREV1
23
PIN
NO.
I/O FUNCTIONNAME
PIN
NO.
I/O FUNCTIONNAME
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
D5
D6
D7
/IRQ0
/IRQ1
Vss
/IRQ2
IRQ3
/RD
/WR
/CE
/ASTB
TESTSIO
RX0
TX0
RX1
TX1
Vss
VDD
RX2
TX2/BO2
RX30
TX30
TX31
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
I
O
I
O
I
O
I
O
I
Data Bus
Interrupt Request Port 0
Interrupt Request Port 1
Ground
Interrupt Request Port 2
Interrupt Request Port 3
Read Signal Input
Write Signal Input
Chip Enable Input
Address Strobe (Not used: to ground)
Input with Pull-down Resistor (50 k)
Receive Data 0
Transmit Data 0
Receive Data 1
Transmit Data 1
Ground
Power Supply
Receive Data 2
Transmit Data 2
Receive Data 30
Transmit Data 30
Receive Data 31
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
TX31
RX32
TX32
RX33
TX33
/IC
Vss
XI
Vss
XO
A0
A1
A2
A3
A4
A5
CPUCLK
Vss
VDD
D0
D1
D2
D3
D4
O
I
O
I
I/O
I
I
I/O
I
I
I
I
I
I
I
I/O
I/O
I/O
I/O
I/O
Transmit Data 31
Receive Data 32
Transmit Data 32
Receive Data 33
Transmit Data 33
Initial Clear
Ground
Quartz Crystal Input
Ground
Quartz Crystal Onput
Address Bus
CPU Clock
Ground
Power Supply
Data Bus
MBCG46183-129 (XV833A00) Gate Array
CPU: IC114
PIN
NO.
I/O FUNCTIONNAME
PIN
NO.
I/O FUNCTIONNAME
1
2
3
4
5
6
7
8
9
10
11
12
13
14
AVDD
PCO
AVSS
M/S
DDIN
TEST
/IC
VSS
XO
XI
MCK
VDD
SDO
SDBCK
-
-
-
O
I
O
-
O
PLL analog power supply (+5 V)
PLL phase comparison output
Analog ground
Master/Slave mode select
Didital audio interface data input
Test pin, not used
Initial clear
Ground
Crystal osc. output (24.576 MHz)
Crystal osc. input (24.576 MHz)
System clock output (12.288 MHz)
Power supply (+5 V)
Serial data output
Serial data I/O bit clock (64 fs)
15
16
17
18
19
20
21
22
23
24
25
26
27
28
SDWCK
SDMCK
VSS
SYNC/U
FS128/C
DBL/V
ERR/BS
/LOCK
INT
VDD
/CS
SO
SI
SCK
I/O
O
-
O
O
O
O
O
O
-
I
I
Serial data I/0 word clock (Fs)
Master clocl for serial output (256 or 128 x Fs)
Ground
Synch. signal for serial output/U bit data output
Serial data master clocl output (128 fs)/C bit data output
Double rate lock output/Validity flag output
Data error flag output/Block start
PLL lock flag
Interrupt output
Power supply (+5 V)
Chip select
Data output
Data input
Bit clock input
YSD917-ME2 (XW526A00) DIR5 (Digital Format Interface Receiver)
CPU: IC150, 151