User's Manual

YMF724F
September 21, 1998
-43-
3. DC Characteristics
Item Symbol Condition Min. Typ. Max. Unit
High Level Input Voltage 1 V
IH1
*1 2.2 V
DD5
+0.5 V
Low Level Input Voltage 1 V
IL1
*1 -0.5 0.8 V
High Level Input Voltage 2 V
IH2
*2 2.2 V
DD5
+0.5 V
Low Level Input Voltage 2 V
IL2
*2 -0.5 0.6 V
High Level Input Voltage 3 V
IH3
*3 2.2 V
Low Level Input Voltage 3 V
IL3
*3 0.8 V
High Level Input Voltage 4 V
IH4
*4 0.7V
DD5
V
Low Level Input Voltage 4 V
IL4
*4 0.2V
DD5
V
Input Leakage Current I
IL
0< V
IN
< V
DD5
-10 10 µA
High Level Output Voltage 1 V
OH1
*5, I
OH1
= -1mA 2.4 V
Low Level Output Voltage 1 V
OL1
*5, I
OL1
= 3mA 0.55 V
High Level Output Voltage 2 V
OH2
*6, I
OH2
= -2mA 2.4 V
Low Level Output Voltage 2 V
OL2
*6, I
OL2
= 6mA 0.55 V
High Level Output Voltage 3 V
OH3
*7, I
OH3
= -4mA 2.4 V
Low Level Output Voltage 3 V
OL3
*7, I
OL3
= 12mA 0.55 V
High Level Output Voltage 4 V
OH4
*8, I
OH4
= -80µA V
DD5
-1.0 V
Low Level Output Voltage 4 V
OL4
*8, I
OL4
= 2mA 0.4 V
Input Pin Capacitance C
IN
515pF
Clock Pin Capacitance C
CLK
515pF
IDSEL Pin Capacitance C
IDSEL
515pF
Output Leakage Current I
OL
-10 10 µA
Power Supply Current 1 PVDD+VDD5 60 mA
(Normal Operation) VDD3 145 mA
Power Supply Current 2 *9, PVDD+VDD5 0.5 2 mA
(Power Save) *9, VDD3 6 10 mA
Note : Top = 0~70°C, PVDD=5.0
±
0.25[V], VDD5=5.0
±
0.25[V], VDD3=3.3
±
0.3[V], LVDD=3.3
±
0.3[V], C
L
=50 pF
*1: Applicable to all PCI Iuput/Output pins and Iunput pins except PCICLK and RST# pin.
*2: Applicable to RST# pin.
*3: Applicable to CBCLK, CSDI, ACDI, ASDI, GP[7:4], RXD, VOLUP#, VOLDW#, ROMDI and TEST[7:0]#
pins.
*4: Applicable to XI24 pin.
*5: Applicable to AD[31:0], C/BE[3:0]#, PAR, REQ#, PCREQ#, SERIRQ#, TXD, ALRCK, ASDO, ACDO, ACS#,
ROMSK, ROMDO, ROMCS and DIT pins.
*6: Applicable to FRAME#, IRDY#, TRDY#, STOP#, DEVSEL#, PERR#, SERR#, ABCLK, ASCLK, CRST#,
CSYNC and CSDO pins.
*7: Applicable to IRQ5, IRQ7, IRQ9, IRQ10, IRQ11 and INTA# pins.
*8: Applicable to CMCLK, XRST# and XO24 pins.
*9: DS-1 Power Control Register, DMC=DPLL0=DPLL1=PSN=PSL0=PSL1=“1”, PCICLK (33MHz) is stopped.