Yuga CLM920 TE3 LTE Module hardware usage guide V1.4

CLM920_TE3 hardware user guide Version 1.2
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Figure 8 USB reference circuit
Design note：
1. USB routing design needs to strictly comply with the requirements of USB2.0 protocol, pay
attention to the protection of the data line, differential line, control impedance is 90 ohm, the
upper and lower left and right ground handling.
2. ESD protection should be added on the data line, the parasitic capacitance of the protection
devices should not exceed 2pF, and the ESD devices should be placed as close as possible to the
USB.
3. Modules can only serve as slave devices for USB buses.
USB interface can support the following functions：
 Software upgrade
 Data communication
 AT Command
 GNSS NMEA output
3.7 UART Interface
CLM920_TE3 provides two groups of UART interfaces: One group is the main serial port,
voltage level is 1.8V, support 9600,19200,38400,57600,115200,230400,460800,921600bps baud
rate, default value is 115200bps, serial port level is 1.8V.
Figure 3-7 UART pin description
PIN
Name
I/O
Description
62
UART_RI
DO
Ring Indicator
63
UART_DCD
DO
DCD
64
UART_CTS
DO
CTS
65
UART_RTS
DI
RTS
66
UART_DTR
DI
DTR