Yuga CLM920 TE5 LTE Module Hardware Manual
Table Of Contents
- 1 Introduction
- 2 Product Overview
- 3 Application Interface
- 4 Overall Technical Indicators
- 5 Interface electrical characteristics
- 6 Structural and mechanical properties
CLM920_TE5 LTE Module Hardware Manual
19
YUGA Information Technology Co.,Ltd
3.3.4 Power-on sequence
Figure 3- 8 Power-on sequence diagram
Table 3- 4 Power-on sequence parameters
Symbol
Description
Min
Typical
Max
Unit
Ton
Low level width of boot
100
500
-
ms
Ton(statu
s)
Boot time(Judge by the
status)
22
-
-
ms
Ton(usb)
Boot time(Judge by the
USB)
-
20
-
ms
Ton(uart)
Boot time(Judge by the
UART)
-
20
-
ms
VIH
PWRKEY high level input
0.6
0.8
1.8
V
VIL
PWRKEY low level input
-0.3
0
0.5
V
3.4 Reset control
CLM920_TE5 module’s reset pin is 22
nd
. Pull this pin low 150-450ms to reset the module.
Recommended that the external pull-up resistor 10K to VDD_EXT. This pin is sensitive
to interference, need to protection circuit.
Ton
Ton(status)
Ton(usb)
Active
USB
Active
UART
STATUS
RESET
PWRKEY
VBAT
Ton(uart)
Treset
10K
4K7
47K
Signal Waveform
RESET
VDD_EXT
RESET
MODULE