CBI/CGI CB BASIC S5721-xxx TECHNICAL REFERENCE Intel® Pentium® III or Intel® Celeron® PROCESSOR-BASED SBC
WARRANTY The product is warranted against material and manufacturing defects for two years from date of delivery. Buyer agrees that if this product proves defective Chassis Plans is only obligated to repair, replace or refund the purchase price of this product at Chassis Plans’ discretion.
TRADEMARKS IBM, PC, VGA, EGA, OS/2 and PS/2 are trademarks or registered trademarks of International Business Machines Corp. AMI and AMIBIOS are trademarks or registered trademarks of American Megatrends Inc. Intel, Pentium, Celeron and AGP are registered trademarks of Intel Corporation. MS-DOS and Microsoft are registered trademarks of Microsoft Corp. PICMG and the PICMG logo are registered trademarks of the PCI Industrial Computer Manufacturers Group. SCSISelect is a trademark of Adaptec, Inc.
CBI/CGI Technical Reference Table of Contents Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-1 Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-3 SBC Block Diagram. . . . . . . . . . . . . .
CBI/CGI Technical Reference Table of Contents Specifications (continued) Temperature/Environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-12 Mean Time Between Failures (MTBF) . . . . . . . . . . . . . . . . . . . . . .1-12 UL Recognition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-12 Configuration Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-13 Ethernet LEDs and Connector . . . . . . . . . . . . . . . . . . . . .
CBI/CGI Technical Reference Table of Contents System BIOS (continued) Save Settings and Exit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-14 Exit Without Saving . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-14 Key Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-15 Standard CMOS Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-1 Standard CMOS Options . . . . . . . . . . . . . .
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CBI/CGI Technical Reference HANDLING PRECAUTIONS _______________________________________________________________________ WARNING: This product has components which may be damaged by electrostatic discharge.
CBI/CGI Technical Reference This page intentionally left blank. Copyright 2003 by Trenton Technology Inc. All rights reserved.
CBI/CGI Technical Reference Specifications Chapter 1 Specifications INTRODUCTION The CBI full-featured PCI/ISA processors are single board computers (SBCs) which feature an Intel® Celeron® microprocessor or Intel® Pentium® III microprocessor, Intel 440BX AGPset, 66/100MHz system and memory buses, Intel Accelerated Graphics Port (AGP) video interface, SDRAM, PCI Local Bus, cache, floppy controller, dual EIDE (Ultra DMA/33) interface, PCI Ultra Wide SCSI controller, PCI 10/100Base-T Ethernet controller,
Specifications MODELS (CONTINUED) CBI/CGI Technical Reference Model # Model Name Speed CBI - BX: (continued) Intel® Celeron® Processor - 66MHz FSB/128K cache: (cont’d) S5721-005-xM S5721-004-xM S5721-003-xM S5721-002-xM CBI/433 CBI/400 CBI/366 CBI/333 433MHz 400MHz 366MHz 333MHz CGI - GX: Intel® Pentium® III Processor - 100MHz FSB/256K cache: S5721-150-xM S5721-149-xM S5721-148-xM S5721-147-xM S5721-146-xM S5721-145-xM S5721-144-xM S5721-143-xM S5721-142-xM S5721-141-xM CGI/1.
CBI/CGI Technical Reference MODELS (CONTINUED) Model # Specifications Model Name Speed CB BASIC - BX: (continued) Intel® Pentium® III Processor - 100MHz FSB/256K: (cont’d) S5721-127-xM S5721-126-xM S5721-125-xM S5721-124-xM S5721-123-xM S5721-122-xM S5721-121-xM CBB/800 CBB/750 CBB/700 CBB/650 CBB/600E CBB/550E CBB/500E 800MHz 750MHz 700MHz 650MHz 600MHz 550MHz 500MHz Intel® Celeron® Processor - 100MHz FSB/128K cache: S5721-225-xM S5721-224-xM CBB/900C CBB/850C 900MHz 850MHz Intel® Celeron® Proce
Specifications FEATURES (CONTINUED) 1-4 CBI/CGI Technical Reference • Intel Accelerated Graphics Port (AGP) VGA on-board video interface • PCI Local Bus supports off-board PCI option cards, PCI 10/100Base-T Ethernet controller and on-board PCI Ultra Wide SCSI controller - Adaptec AIC-7880 • DRAM error checking and correction (ECC) support • Compatible with PCI Industrial Computer Manufacturers Group (PICMG) 1.
CBI/CGI Technical Reference Specifications SBC BLOCK DIAGRAM Chassis Plans 1-5
Specifications CBI/CGI Technical Reference SBC PROCESSOR BOARD LAYOUT 1-6 Chassis Plans
CBI/CGI Technical Reference PROCESSORS • Specifications Intel® Pentium® III (FC-PGA) microprocessor • 1.
Specifications CBI/CGI Technical Reference (L1) instruction cache and 16K L1 data cache. These cache arrays run at the full speed of the processor core. For Celeron processors, a 128K unified, non-blocking second level (L2) cache improves performance by reducing the average memory access time and providing fast access to recently used instructions and data.
CBI/CGI Technical Reference Specifications Specification, the PC Registered DIMM Specification and the PC Serial Presence Detect Specification. MEMORY HOLE The SBC supports a 1MB memory hole option at 512KB-640KB or 15MB-16MB. ERROR CHECKING AND CORRECTION The memory interface supports ECC modes via BIOS setting for multiple-bit error detection and correction of all errors confined to a single nibble. PCI LOCAL BUS INTERFACE The SBC is fully compliant with the PCI Local Bus 2.1 Specification.
Specifications CBI/CGI Technical Reference The LM80 also monitors an external chassis intrusion switch via the system hardware monitor connector (P18). A general purpose output (GPO) is also provided at the system hardware monitor connector. This signal can be used to provide a user-defined function. The following system voltages are monitored by the LM80: • -12 volts • 3.3 volts provided by the on-board voltage regulator for components on the SBC • 3.
CBI/CGI Technical Reference Specifications PCI ENHANCED IDE ULTRA DMA/33 INTERFACE (DUAL) Dual high performance PCI Bus Master EIDE interfaces are capable of supporting two IDE Type 4 disk drives each in a master/slave configuration. The interface supports Ultra DMA/33 with synchronous DMA mode transfers up to 33MB per second. FLOPPY DRIVE INTERFACE The SBC supports two floppy disk drives. Drives can be 360K to 2.88MB, in any combination.
Specifications BATTERY CBI/CGI Technical Reference A built-in lithium battery is provided, for ten years of data retention for CMOS memory. ______________________________________________________________________ CAUTION: There is a danger of explosion if the battery is incorrectly replaced. Replace it only with the same or equivalent type recommended by the manufacturer. Dispose of used batteries according to the manufacturer's instructions.
CBI/CGI Technical Reference CONFIGURATION JUMPERS Specifications The setup of the configuration jumpers on the SBC is described below. * indicates the default value of each jumper. ______________________________________________________________________ NOTE: For two-position jumpers (3-post), "RIGHT" is toward the bracket end of the board; "LEFT" is toward the memory sockets.
Specifications CONFIGURATION JUMPERS (CONTINUED) CBI/CGI Technical Reference Jumper Description JU13 SCSI Termination Enable (not available on BASIC models) Install to disable on-board active termination for the SCSI interface. Remove to enable active termination. * JU14 Fan Speed Monitor This jumper must be removed (disabled). JU15 3.3V Monitor Enable Install to enable the 3.3V monitor. Remove to disable the monitor.
CBI/CGI Technical Reference ETHERNET LEDS AND CONNECTOR (NOT AVAILABLE ON BASIC MODELS) Specifications The Ethernet interface has two LEDs for status indication and an RJ-45 network connector. LED/Connector Description Link/Activity LED Green LED which indicates the link status Off The Ethernet interface did not find a valid link on the network connection. Transmit and receive are not possible.
Specifications CONNECTORS CBI/CGI Technical Reference ______________________________________________________________________ NOTE: Pin 1 on the connectors is indicated by the square pad on the PCB.
CBI/CGI Technical Reference CONNECTORS (CONTINUED) P4A - Specifications Keyboard Header 5 pin single row header, Amp #640456-5 Pin 1 2 3 4 5 P5 - Speaker Port Connector 4 pin single row header, Amp #640456-4 Pin 1 2 3 4 P5A - - - Signal Pin Carrier Detect 2 Receive Data-I 4 Transmit Data-O 6 Data Terminal Ready-O 8 Signal Gnd 10 Signal Data Set Ready-I Request to Send-O Clear to Send-I Ring Indicator-I NC Serial Port 2 Connector 10 pin dual row header, 3M #30310-6002HB Pin 1 3 5 Chassis Plans
Specifications CONNECTORS (CONTINUED) CBI/CGI Technical Reference P7 - Serial Port 2 Connector (continued) Pin 7 9 P8 - - Pin 2 4 6 8 10 12 14 16 18 20 22 24 26 Signal Auto Feed XT Error Init Slct In Gnd Gnd Gnd Gnd Gnd Gnd Gnd Gnd NC Signal Ms Data Reserved Gnd Kbd Power (+5V fused) with self-resetting fuse Ms Clock Reserved PS/2 Mouse Header 6 pin single row header, Amp #640456-6 Pin 1 2 3 4 5 6 1-18 Signal Strobe Data Bit 0 Data Bit 1 Data Bit 2 Data Bit 3 Data Bit 4 Data Bit 5 Data Bit 6 Da
CBI/CGI Technical Reference CONNECTORS (CONTINUED) P10 - Specifications External Reset Connector 2 pin header, Amp #640456-2 Pin 1 2 P11 - Primary IDE Hard Drive Connector 40 pin dual row header, Robinson Nugent #IDH-40LP-S3-TR Pin 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 P11A - Signal Reset Data 7 Data 6 Data 5 Data 4 Data 3 Data 2 Data 1 Data 0 Gnd DRQ 0 IOW IOR IORDY DACK 0 IRQ 14 Add 1 Add 0 CS 1P IDEACTP Pin 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 Signal Gnd Data
Specifications CONNECTORS (CONTINUED) CBI/CGI Technical Reference P11A - Primary IDE Hard Drive Connector (continued) Pin 29 31 33 35 37 39 P12 - Signal DACK 1 MIRQ 0 Add 1 Add 0 CS 1S IDEACTS Pin 30 32 34 36 38 40 Signal Gnd IOCS16 Gnd Add 2 CS 3S Gnd Hard Drive LED Connector 4 pin single row header, Amp #640456-4 (This connector is used for both IDE and SCSI drives. See JU19 in the Configuration Jumpers section.
CBI/CGI Technical Reference CONNECTORS (CONTINUED) P13 - Specifications PCI Ultra Wide SCSI Controller Connector (continued) Pin 23 24 25 26 27 28 29 30 31 32 33 34 P15 - Signal Gnd Gnd Gnd Gnd Gnd Gnd Gnd Gnd Gnd Gnd Gnd WIDEPS Pin 57 58 59 60 61 62 63 64 65 66 67 68 Signal SCZBSY SCZACK ASCRST SCZMSG SCZSEL SCZCD SCZREQ SCZIO SCZDB8 SCZDB9 SCZDB10 SCZDB11 PCI SVGA Interface Connector (not available on BASIC models) 15 pin VGA connector, Amp #748390-5 Pin Signal Pin Signal Pin Signal 1 2 3 4 5 P16
Specifications CONNECTORS (CONTINUED) CBI/CGI Technical Reference P17 - Universal Serial Bus (USB) Connector 8 pin dual row header, Molex #702-46-0821 (+5V fused with self-resetting fuses) Pin 1 3 5 7 P18 - Pin 2 4 6 8 Signal +5V-USB1 USB1USB1+ Gnd-USB1 System Hardware Monitor Connector 6 pin single row header, Amp #640456-6 Pin 1 2 3 4 5 6 P19 - Signal +5V-USB0 USB0USB0+ Gnd-USB0 Signal Gnd GPO (General Purpose Output) CI (Chassis Intrusion Input) FAN1 (Fan 1 Tachometer Input) FAN2 (Fan 2 Tachome
CBI/CGI Technical Reference Chapter 2 ISA/PCI Reference ISA/PCI Reference ISA BUS PIN NUMBERING 62-pin ISA Bus Connector Component Side of Board 36-pin ISA Bus Connector Chassis Plans 2-1
ISA/PCI Reference ISA BUS PIN ASSIGNMENTS CBI/CGI Technical Reference The following tables summarize pin assignments for the Industry Standard Architecture (ISA) Bus connectors.
CBI/CGI Technical Reference ISA BUS SIGNAL DESCRIPTIONS ISA/PCI Reference The following is a description of the ISA Bus signals. All signal lines are TTLcompatible. AEN (O) Address Enable (AEN) is used to degate the microprocessor and other devices from the I/O channel to allow DMA transfers to take place. When this line is active, the DMA controller has control of the address bus, the data-bus Read command lines (memory and I/O), and the Write command lines (memory and I/O).
ISA/PCI Reference CBI/CGI Technical Reference IO16# (I) I/O 16-bit Chip Select (IO16#) signals the system board that the present data transfer is a 16-bit, 1 wait-state, I/O cycle. It is derived from an address decode. IO16# is active low and should be driven with an open collector or tri-state driver capable of sinking 20 mAmps. IOCHK# (I) I/O Channel Check (IOCHK#) provides the system board with parity (error) information about memory or devices on the I/O channel.
CBI/CGI Technical Reference ISA/PCI Reference NOWS# (I) The No Wait State (NOWS#) signal tells the microprocessor that it can complete the present bus cycle without inserting any additional wait cycles. In order to run a memory cycle to a 16-bit device without wait cycles, NOWS# is derived from an address decode gated with a Read or Write command.
ISA/PCI Reference CBI/CGI Technical Reference T-C (O) Terminal Count (T-C) provides a pulse when the terminal count for any DMA channel is reached.
CBI/CGI Technical Reference ISA/PCI Reference I/O ADDRESS MAP* INTERRUPT ASSIGNMENTS* Hex Range Device 000-01F 020-03F 040-05F 060-06F 070-07F 080-09F 0A0-0BF 0C0-0DF 0F0 0F1 0F8-0FF DMA Controller 1 Interrupt Controller 1, Master Timer 8042 (Keyboard) Real-time Clock, NMI (non-maskable interrupt) Mask DMA Page Register Interrupt Controller 2 DMA Controller 2 Clear Math Coprocessor Busy Reset Math Coprocessor Math Coprocessor 1F0-1F8 200-207 278-27F 2F8-2FF 300-31F 360-36F 378-37F 380-38F 3A0-3AF 3B
ISA/PCI Reference PCI LOCAL BUS OVERVIEW CBI/CGI Technical Reference The PCI (Peripheral Component Interconnect) Local Bus is a high performance, 32-bit or 64-bit bus with multiplexed address and data lines. It is intended for use as an interconnect mechanism between highly integrated peripheral controller components, peripheral add-in boards and processor/memory systems.
CBI/CGI Technical Reference PCI LOCAL BUS SIGNAL DEFINITION ISA/PCI Reference The PCI interface requires a minimum of 47 pins for a target-only device and 49 pins for a master to handle data and addressing, interface control, arbitration and system functions. The diagram below shows the pins in functional groups, with required pins on the left side and optional pins on the right side.
ISA/PCI Reference CBI/CGI Technical Reference PCI LOCAL BUS PIN NUMBERING Component Side of Board 5-volt/32-bit PCI Connector 2-10 Chassis Plans
CBI/CGI Technical Reference PCI LOCAL BUS PIN ASSIGNMENTS ISA/PCI Reference The PCI Local Bus pin assignments shown below are for the PCI option slots on the backplane. The PCI Local Bus specifies both 5-volt and 3.3-volt signaling environments. The following bus pin assignments are for the 5-volt connector. The 3.3-volt connector bus pin assignments are the same with the following exceptions: * The pins noted as +V (I/O) are +5 volts or +3.3 volts, depending on which connector is being used.
ISA/PCI Reference CBI/CGI Technical Reference PCI LOCAL BUS PIN ASSIGNMENTS (CONTINUED) I/O Pin Signal Name 2-12 I/O Pin Signal Name B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 +3.3V DEVSEL# Gnd LOCK# PERR# +3.3V SERR# +3.3V C/BE1# AD14 Gnd AD12 AD10 Gnd †† A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 TRDY# Gnd STOP# +3.3V SDONE SBO# Gnd PAR AD15 +3.
CBI/CGI Technical Reference PCI LOCAL BUS PIN ASSIGNMENTS (CONTINUED) The following pin assignments apply only to backplanes with 64-bit PCI option slots.
ISA/PCI Reference PCI LOCAL BUS SIGNAL DESCRIPTIONS CBI/CGI Technical Reference The PCI Local Bus signals are described below and may be categorized into the following functional groups: • System Pins • Address and Data Pins • Interface Control Pins • Arbitration Pins (Bus Masters Only) • Error Reporting Pins • Interrupt Pins (Optional) • Cache Support Pins (Optional) • 64-Bit Bus Extension Pins (Optional) • JTAG/Boundary Scan Pins (Optional) A # symbol at the end of a signal name indicat
CBI/CGI Technical Reference ISA/PCI Reference C/BE[7::4]# (optional) Bus Command and Byte Enables are multiplexed on the same pins. During an address phase (when using the DAC command and when REQ64# is asserted), the actual bus command is transferred on C/BE[7::4]#; otherwise, these bits are reserved and indeterminate. During a data phase, C/BE[7::4]# are byte enables indicating which byte lanes carry meaningful data when REQ64# and ACK64# are both asserted.
ISA/PCI Reference CBI/CGI Technical Reference PAR Parity is even parity across AD[31::00] and C/BE[3::0]#. Parity generation is required by all PCI agents. The master drives PAR for address and write data phases; the target drives PAR for read data phases. PAR64 (optional) Parity Upper DWORD is the even parity bit that protects AD[63::32] and C/BE[7::4]#. The master drives PAR64 for address and write data phases; the target drives PAR64 for read data phases.
CBI/CGI Technical Reference ISA/PCI Reference STOP# Stop indicates that the current target is requesting the master to stop the current transaction. TCK (optional) Test Clock is used to clock state information and test data into and out of the device during operation of the TAP (Test Access Port). TDI (optional) Test Data Input is used to serially shift test data and test instructions into the device during TAP (Test Access Port) operation.
ISA/PCI Reference PICMG EDGE CONNECTOR PIN ASSIGNMENTS CBI/CGI Technical Reference The pin assignments shown below are for the PICMG portion of the edge connector on the processor board. These pin assignments match those of the PICMG connector of the processor slot on the backplane.
CBI/CGI Technical Reference PICMG EDGE CONNECTOR PIN ASSIGNMENTS (CONTINUED) Chassis Plans ISA/PCI Reference I/O Pin Signal Name I/O Pin Signal Name B50 B51 Connector Key Connector Key A50 A51 Connector Key Connector Key B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 AD8 AD7 NC AD5 AD3 Gnd AD1 +5V ACK64# +5V +5V A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 C/BE0# NC AD6 AD4 Gnd AD2 AD0 +5V REQ64# +5V +5V 32-bit connector end 2-19
ISA/PCI Reference PICMG EDGE CONNECTOR PIN ASSIGNMENTS (CONTINUED) CBI/CGI Technical Reference The following pin assignments apply only to SBCs with 64-bit PICMG connectors.
CBI/CGI Technical Reference System BIOS Chapter 3 System BIOS BIOS OPERATION Sections 3 through 8 of this manual describe the operation of the American Megatrends AMIBIOS and the AMIBIOS Setup Utility. Refer to Running AMIBIOS Setup later in this chapter for standard Setup screens, options and defaults. The available Setup screens, options and defaults may vary if you have a custom BIOS. When the system is powered on, AMIBIOS performs the Power-On Self Test (POST) routines.
System BIOS CBI/CGI Technical Reference the validity of the system setup information stored in the system CMOS RAM. (See Running AMIBIOS Setup later in this chapter.) If AMIBIOS detects a fault, the screen displays the error condition(s) which has/have been detected. If no errors are detected, AMIBIOS attempts to load the system from any bootable device, such as a floppy disk or hard disk. Normally, the only POST routine visible on the screen is the memory test.
CBI/CGI Technical Reference System BIOS Password Entry The system may be configured so that the user is required to enter a password each time the system boots or whenever an attempt is made to enter AMIBIOS Setup. The password function may also be disabled so that the password prompt does not appear under any circumstances. The Password Check option in the Advanced CMOS Setup program allows you to specify when the password prompt displays: Always or only when Setup is attempted.
System BIOS CBI/CGI Technical Reference You may try again to enter the correct password. If you enter the password incorrectly three times, the system responds in one of two different ways, depending on the value specified in the Password Check option on the Advance CMOS Setup screen: 1) If the Password Check option is set to Setup, the system does not let you enter Setup, but does continue the booting process. You must reboot the system manually to retry entering the password.
CBI/CGI Technical Reference RUNNING AMIBIOS SETUP System BIOS AMIBIOS Setup keeps a record of system parameters, such as date and time, disk drives, display type and other user-defined parameters. The Setup parameters reside in the Read Only Memory Basic Input/Output System (ROM BIOS) so that they are available each time the system is turned on. AMIBIOS Setup stores the information in the complementary metal oxide semiconductor (CMOS) memory.
System BIOS AMIBIOS SETUP UTILITY MAIN MENU CBI/CGI Technical Reference When you press in response to an error message received during the POST routines or when you press the key to enter the AMIBIOS Setup Utility, the following screen displays: AMIBIOS HIFLEX SETUP UTILITY - VERSION X.XX (C)1998 American Megatrends, Inc.
CBI/CGI Technical Reference • Chassis Plans System BIOS • Primary Master and Slave Disk Types • Secondary Master and Slave Disk Types • Logical Block Address (LBA) Mode • Block Mode • PIO Mode • 32Bit Mode • Boot Sector Virus Protection Select Advanced CMOS Setup to make changes to Advanced CMOS Setup parameters as described in the Advanced Setup chapter of this manual.
System BIOS CBI/CGI Technical Reference • Select Advanced Chipset Setup to make changes to Advanced Chipset Setup parameters as described in the Advanced Setup chapter of this manual.
CBI/CGI Technical Reference • System BIOS • Power Button Function • Green PC Monitor Power State • Video Power Down Mode • Hard Disk Power Down Mode • Hard Disk Time Out • Power Saving Type • Standby/Suspend Timer Unit • Standby Time Out • Suspend Time Out • Slow Clock Ratio • Display Activity • Device 0 through Device 8 Monitor Select PCI/Plug and Play Setup to make changes to PCI/Plug and Play Setup parameters as described in the PCI/Plug and Play Setup chapter of this manual.
System BIOS CBI/CGI Technical Reference • • 3-10 OnBoard Parallel Port • Parallel Port Mode • EPP Version • Parallel Port IRQ • Parallel Port DMA Channel OnBoard IDE • Select Auto-Detect Hard Disks to have AMIBIOS automatically detect the type and parameters of each hard drive if you have IDE drive(s). This option is described later in this chapter. • Select Change User Password to establish or change the password for the user. This function is described later in this chapter.
CBI/CGI Technical Reference AUTO-DETECT HARD DISKS System BIOS The Auto-Detect Hard Disks option allows you to have AMIBIOS automatically detect the type of hard disk drive(s) in your system. The automatic detection functions only if you have IDE drives. The parameters are reported on the Standard CMOS Setup screen. AMIBIOS searches first for the primary master and slave hard disk drives, then for the secondary master and slave drives. If it can access a drive, it reads the disk parameters.
System BIOS CBI/CGI Technical Reference This is the message which displays before you have established a password or if the last password entered was the null password. If a password has already been established, you are asked to enter the current password before being prompted to enter the new password. Type the new password and press . The password cannot exceed six (6) characters in length. The screen does not display the characters as you type them.
CBI/CGI Technical Reference System BIOS The Change User Password option is similar in functionality to the Change Supervisor Password and displays the same messages, except that "user" replaces "supervisor." If you have signed on under the user password, you cannot change the supervisor password.
System BIOS CBI/CGI Technical Reference Auto Configuration with Fail Safe Settings This option allows you to load the Fail Safe default settings when you cannot boot your computer successfully. These settings are more likely to configure a workable computer. They may not provide optimal performance, but are the most stable settings. You may use this option as a diagnostic aid if your system is behaving erratically. Select the Fail Safe settings and then try to diagnose the problem after the computer boots.
CBI/CGI Technical Reference KEY CONVENTIONS Chassis Plans System BIOS Listed below is an explanation of the keys you may use for navigation and selection in the AMIBIOS Setup Utility: Key Task Close the current operation and return to the previous level. Move to the next field. Arrow keys Move to the next field in the desired direction. Select the current item. / Change background and foreground colors.
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CBI/CGI Technical Reference Standard CMOS Setup Chapter 4 Standard CMOS Setup STANDARD CMOS SETUP When you select Standard CMOS Setup from the AMIBIOS Setup Utility Main Menu, the following Setup screen displays: AMIBIOS SETUP - STANDARD CMOS SETUP (C)1998 American Megatrends, Inc. All Rights Reserved Date (mm/dd/yyyy): Mon Jan 01, 1996 Time (hh/mm/ss): 12:30:00 Floppy Drive A: Floppy Drive B: Pri Pri Sec Sec Master Slave Master Slave : : : : Base Memory: 640 KB Extd Memory: 14 MB 1.
Standard CMOS Setup CBI/CGI Technical Reference The Help window displays allowable settings: Month : Jan - Dec Day : 01 - 31 Year : 1901 - 2099 There are three fields for entering the date. Use the left and right arrow keys or the tab key to move from one field to another; use the plus and minus (or PgUp and PgDn) keys to scroll through the allowable values for the field. As you scroll through the month, day or year field, the day of the week changes automatically to reflect the new date.
CBI/CGI Technical Reference Standard CMOS Setup through 1F7H, 3F6H and IRQ14. The secondary controller uses I/O port addresses 170H through 177H, 376H and IRQ15. The AMIBIOS enhanced IDE (EIDE) interface can support IDE Type 4 disk drives. This EIDE interface allows disk drives greater than 528MB to be used. The hard disk drives can be detected automatically by AMIBIOS (if they are IDE drives) or can be defined manually by the user, as described below.
Standard CMOS Setup CBI/CGI Technical Reference • Set the drive type to Auto to have AMIBIOS detect the drive type and parameters automatically each time the system is booted up. This option does not display the drive type on the Standard CMOS Setup screen, but does display it on the System Configuration screen shown after a successful bootup.
CBI/CGI Technical Reference Standard CMOS Setup sector size by boosting the write current for sectors on inner tracks. This parameter designates the track (cylinder) number where write precompensation begins. Sectors (Sec) designates the number of disk sectors per track.
Standard CMOS Setup CBI/CGI Technical Reference Available options are: Off On Programmed I/O (PIO) Mode IDE PIO mode programs timing cycles between the IDE drive and the programmable IDE controller. As the PIO mode increases, the cycle time decreases. Set the PIO Mode option to Auto to have AMIBIOS select the PIO mode used by the IDE drive being configured.
CBI/CGI Technical Reference Standard CMOS Setup Select ‘Y’ or ‘N’ as appropriate. You may have to select ‘N’ several times to prevent the boot sector write. The following message displays if any attempt is made to format any cylinder, head or sector of any hard disk drive via the BIOS INT 13 Hard Disk Drive Service: Format!!! Possible VIRUS: Continue (Y/N)? Select ‘Y’ or ‘N’ as appropriate. If you select ‘Y’ to continue, formatting proceeds normally.
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CBI/CGI Technical Reference Advanced Setup Chapter 5 Advanced Setup ADVANCED CMOS SETUP When you select Advanced CMOS Setup from the AMIBIOS Setup Utility Main Menu, the following Setup screen displays: AMIBIOS SETUP - ADVANCED CMOS SETUP (C)1998 American Megatrends, Inc.
Advanced Setup ADVANCED CMOS SETUP OPTIONS CBI/CGI Technical Reference The descriptions for the system options listed below show the values as they appear if you have not yet run Advanced CMOS Setup. Once values have been defined, they display each time Advanced CMOS Setup is run. Quick Boot This option allows you to have the AMIBIOS boot quickly when the computer is powered on or go through more complete testing. When this option is set to Disabled, AMIBIOS tests all system memory.
CBI/CGI Technical Reference Advanced Setup Available options are: Auto Floppy Hard Disk 1st Boot Device This option specifies the device type of the first boot drive from which AMIBIOS attempts to boot after AMIBIOS post routines complete.
Advanced Setup CBI/CGI Technical Reference The Setup screen displays the system option: Try Other Boot Devices Yes Available options are: No Yes Initialize I2O Devices If this option is set to Yes, AMIBIOS initializes any attached I2O devices (processors or storage devices).
CBI/CGI Technical Reference Advanced Setup Hard Disk Access Control This option specifies the read/write access which is set when booting from a hard disk drive. This option is effective only if the device is accessed through the BIOS. The Setup screen displays the system option: Hard Disk Access Control Read-Write Available options are: Read-Write Read-Only S.M.A.R.T.
Advanced Setup CBI/CGI Technical Reference The Setup screen displays the system option: PS/2 Mouse Support Enabled Available options are: Disabled Enabled System Keyboard This option indicates whether or not a keyboard is attached to the computer. The Setup screen displays the system option: System Keyboard Present Available options are: Absent Present Primary Display This option specifies the type of display monitor in the system. The Absent option can be used for network file servers.
CBI/CGI Technical Reference Advanced Setup Two options are available: • Select Setup to have the password prompt appear only when an attempt is made to enter the AMIBIOS Setup program. • Select Always to have the password prompt appear each time the system is powered on.
Advanced Setup CBI/CGI Technical Reference Three options are available: • Select Disabled to disable both L1 internal cache memory on the SBC and L2 secondary cache memory. • Select WriteThru to use the write-through caching algorithm. • Select WriteBack to use the write-back caching algorithm. External Cache This option specifies the caching algorithm used for L2 cache memory. If the Internal Cache option described above is set to Disabled, this option is not available for modification.
CBI/CGI Technical Reference Advanced Setup accessed more rapidly than ROM and the data bus is wider to RAM. The default setting for the video BIOS segments is Cached. Other 16KB ROM segments may be shadowed in the memory area from C800H to E000H, depending upon preferences and system requirements. The ROM area that is not used by ISA adapter cards is allocated to PCI adapter cards.
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CBI/CGI Technical Reference ADVANCED CHIPSET SETUP Advanced Setup When you select Advanced Chipset Setup from the AMIBIOS Setup Main Menu, the following Setup screen displays: AMIBIOS SETUP - ADVANCED CHIPSET SETUP (C)1998 American Megatrends, Inc.
Advanced Setup ADVANCED CHIPSET SETUP OPTIONS CBI/CGI Technical Reference The descriptions for the system options listed below show the values as they appear if you have not run the Advanced Chipset Setup program yet. Once values have been defined, they display each time Advanced Chipset Setup is run. _______________________________________________________________________ NOTE: Do not change the values for the options on this screen unless you understand the impact on system operation.
CBI/CGI Technical Reference Advanced Setup Available options are: Disabled Enabled SERR# This option enables the System Error (SERR#) signal on the bus. The Setup screen displays the system option: SERR# Disabled Available options are: Disabled Enabled PERR# This option enables the Parity Error (PERR#) signal on the bus.
Advanced Setup CBI/CGI Technical Reference The Setup screen displays the system option: BX Master Latency Timer (Clks) 64 Available options are: Disabled 32 64 96 128 160 192 224 Multi-Transaction Timer (Clks) This option specifies the multi-transaction latency timings (in PCI clocks) for devices on the SBC.
CBI/CGI Technical Reference Advanced Setup Three options are available: • None - No error checking or error reporting is done. • EC - Multibit errors are detected and reported as parity errors. Single-bit errors are corrected by the chipset. Corrected bits of data from memory are not written back to DRAM system memory. • ECC Hardware - Multibit errors are detected and reported as parity errors. Single-bit errors are corrected by the chipset and are written back to DRAM system memory.
Advanced Setup CBI/CGI Technical Reference Graphics Aperture Size (not available on BASIC models) This option specifies the amount of system memory which can be used by the Accelerated Graphics Port (AGP). The Setup screen displays the system option: Graphics Aperture Size 64MB Available options are: 4 MB 8 MB 16MB 32MB 64MB 128 MB 256 MB AGP Multi-Transaction Timer (AGP Clks) (not available on BASIC models) This option sets the AGP multi-transaction timer. The settings are in units of AGP clocks.
CBI/CGI Technical Reference Advanced Setup The Setup screen displays the system option: AGP SERR Enabled Available options are: Disabled Enabled AGP Parity Error Response (not available on BASIC models) This option enables the Accelerated Graphics Port (AGP) to respond to parity errors.
Advanced Setup CBI/CGI Technical Reference Available options are: Disabled 3 Sysclk 1 Sysclk 2 Sysclk 4 Sysclk PIIX4 SERR# This option enables the System Error (SERR#) signal for the Intel PIIX4 chip. The Setup screen displays the system option: PIIX4 SERR# Disabled Available options are: Disabled Enabled USB Passive Release This option enables passive release for the Universal Serial Bus (USB).
CBI/CGI Technical Reference Advanced Setup The Setup screen displays the system option: PIIX4 Delayed Transaction Enabled Available options are: Disabled Enabled Type F DMA Buffer Control1/Type FDMA Buffer Control2 These options specify the DMA channels where Type F buffer control is implemented.
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CBI/CGI Technical Reference Power Management Setup Chapter 6 Power Management Setup POWER MANAGEMENT SETUP When you select Power Management Setup from the AMIBIOS Setup Utility Main Menu, the following Setup screen displays: AMIBIOS SETUP - POWER MANAGEMENT SETUP (C)1998 American Megatrends, Inc.
Power Management Setup CBI/CGI Technical Reference The Setup screen displays the system option: ACPI Aware O/S No Available options are: No Yes Power Management/APM This option allows you to enable Advanced Power Management (APM) on your system. If this option is disabled, you cannot change any other options on the Power Management Setup screen, except the ACPI Aware O/S.
CBI/CGI Technical Reference Power Management Setup Available options are: Stand By Suspend Off Video Power Down Mode If the video subsystem remains inactive for a specified period of time, AMIBIOS conserves power by placing the subsystem into the power management state specified in this option. The period of inactivity before the subsystem enters Standby mode is specified in the Standby Time Out option; the period of inactivity for Suspend mode is specified in the Suspend Time Out option.
Power Management Setup CBI/CGI Technical Reference Available options are: Disabled 1 through 15, in increments of 1 minute Power Saving Type The Setup screen displays the system option: Power Saving Type POS Available options are: POS (Power On Suspend) Sleep Stop Clock Deep Sleep Standby/Suspend Timer Unit This option specifies the unit of time used for the Standby and Suspend time-out periods.
CBI/CGI Technical Reference Power Management Setup Suspend Time Out This option specifies the length of the period of system inactivity when the computer is already in Standby mode before it is placed in Suspend mode. In Suspend mode, nearly all power use is curtailed. The default for this option depends on the value selected in the Standby/Suspend Timer Unit option.
Power Management Setup CBI/CGI Technical Reference Available options are: Ignore Monitor Device 0 through Device 8 Monitoring These options allow you to enable event monitoring for your peripherals and hard disk drives. If an option is set to Monitor and the computer is in a power-saving mode, AMIBIOS watches for activity on the hardware interrupt request line (IRQ) for the specified device. If any activity occurs, the computer enters full power-on mode.
CBI/CGI Technical Reference PCI/Plug and Play Setup Chapter 7 PCI/Plug and Play Setup PCI/PLUG AND PLAY SETUP When you select PCI/Plug and Play Setup from the AMIBIOS Setup Utility Main Menu, the following Setup screen displays: AMIBIOS SETUP - PCI / PLUG AND PLAY SETUP (C)1998 American Megatrends, Inc.
PCI/Plug and Play Setup CBI/CGI Technical Reference On Board LAN (not available on BASIC models) The Setup screen displays the system option: On Board LAN Enabled Available options are: Disabled Enabled On Board Video (not available on BASIC models) The Setup screen displays the system option: On Board Video Enabled Available options are: Disabled Enabled On Board SCSI (not available on BASIC models) The Setup screen displays the system option: On Board SCSI Enabled Available options are: Disabled E
CBI/CGI Technical Reference PCI/Plug and Play Setup Available options are: No Yes PCI Latency Timer (PCI Clocks) This option specifies the latency of all PCI devices on the PCI Local Bus. The settings are in units equal to PCI clocks.
PCI/Plug and Play Setup CBI/CGI Technical Reference The Setup screen displays the system option: PCI IDE BusMaster Disabled Available options are: Disabled Enabled OffBoard PCI IDE Card This option specifies the PCI expansion slot on the SBC where the off-board PCI IDE controller is installed, if any. If an off-board PCI IDE controller is used, the on-board IDE controller on the SBC is automatically disabled. If Auto is selected, AMIBIOS automatically determines the correct setting for this option.
CBI/CGI Technical Reference PCI/Plug and Play Setup Available options are: Disabled INTA INTB INTC INTD Hardwired DMA Channels 0, 1, 3, 5, 6 and 7 These options allow you to specify the bus type used by each DMA channel. The Setup screen displays the system option: DMA Channel # PnP where # is the DMA Channel number.
PCI/Plug and Play Setup CBI/CGI Technical Reference Reserved Memory Size This option specifies the size of the memory area reserved for legacy ISA adapter cards. If this option is set to Disabled, the Reserved Memory Address option is not available for modification.
CBI/CGI Technical Reference Peripheral Setup Chapter 8 Peripheral Setup PERIPHERAL SETUP When you select Peripheral Setup from the AMIBIOS Setup Utility Main Menu, the following Setup screen displays: AMIBIOS SETUP - PERIPHERAL SETUP (C)1998 American Megatrends, Inc.
Peripheral Setup CBI/CGI Technical Reference OnBoard FDC The on-board floppy drive controller may be enabled or disabled using this option. When this option is set to Auto, AMIBIOS attempts to enable any floppy drive controller on the ISA Bus. If no floppy controller is found on the ISA Bus, the on-board floppy controller is enabled.
CBI/CGI Technical Reference Peripheral Setup For example, if there is one off-board serial port on the ISA Bus and its address is set to 2F8H, Serial Port 1 is assigned address 3F8H and Serial Port 2 is assigned address 3E8H. Configuration is then as follows: COM1 - Serial Port 1 (at 3F8H) COM2 - off-board serial port (at 2F8H) COM3 - Serial Port 2 (at 3E8H) OnBoard Parallel Port This option enables the parallel port on the SBC and establishes the base I/O address for the port.
Peripheral Setup CBI/CGI Technical Reference • ECP allows the parallel port to be used with devices which adhere to the Extended Capabilities Port (ECP) specification. ECP uses the DMA protocol to achieve transfer rates of approximately 2.5MB/second. ECP provides symmetric bidirectional communication. EPP Version This option specifies the Enhanced Parallel Port (EPP) specification number which is used in the system. It is available only if the Parallel Port Mode option is set to EPP.
CBI/CGI Technical Reference Peripheral Setup OnBoard IDE This option specifies the on-board integrated drive electronics (IDE) controller channel(s) to be used. The Setup screen displays the system option: OnBoard IDE Both Available options are: Both Disabled Primary Secondary _______________________________________________________________________ NOTE: If this option is set to Secondary or Both, the system assigns interrupt request 15 (IRQ15).
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CBI/CGI Technical Reference Appendix A BIOS Messages BIOS BEEP CODES Errors may occur during the POST (Power-On Self Test) routines which are performed each time the system is powered on. Non-fatal errors are those which, in most cases, allow the system to continue the bootup process. The error message normally appears on the screen. See BIOS Error Messages later in this appendix for descriptions of these messages. Fatal errors are those which will not allow the system to continue the bootup procedure.
CBI/CGI Technical Reference BIOS BEEP CODES (CONTINUED) BIOS ERROR MESSAGES Beep Count Message Description 10 CMOS Shutdown Register Read/Write Error The shutdown register for the CMOS RAM has failed. 11 Cache Memory Bad; Do Not Enable Cache The cache memory test failed. Cache memory is disabled. Do not press <+> to enable cache memory.
CBI/CGI Technical Reference BIOS ERROR MESSAGES (CONTINUED) Chassis Plans Message Description CH-2 Timer Error Most AT standard system boards include two timers. An error with Timer #1 is a fatal error, explained in BIOS Beep Codes earlier in this appendix. If an error occurs with Timer #2, this error message appears. CMOS Battery State Low There is a battery in the system which is used for storing the CMOS values. This battery appears to be low in power and needs to be replaced.
CBI/CGI Technical Reference BIOS ERROR MESSAGES (CONTINUED) Message Description HDD Controller Failure The BIOS is not able to communicate with the hard disk drive controller. Check all appropriate connections after the system is powered off. INTR #1 Error Interrupt channel #1 has failed the POST routine. INTR #2 Error Interrupt channel #2 has failed the POST routine. Invalid Boot Diskette The BIOS can read the disk in floppy drive A:, but it cannot boot up the system with it.
CBI/CGI Technical Reference ISA BIOS NMI HANDLER MESSAGES Message Description Memory Parity Error Memory failed. The message appears as follows: MEMORY PARITY ERROR AT XXXXX where XXXXX is the address (in hexadecimal) at which the error has occurred. If the memory location cannot be determined, the message is “Memory Parity Error ????” I/O Card Parity Error An expansion card failed.
CBI/CGI Technical Reference PORT 80 CODES The following codes are presented on Port 80H as the BIOS performs its reset procedure. Code Description Uncompressed Initialization Code Checkpoints: D0 NMI is disabled. Power-on delay starting. Initialization code checksum to be verified next. D1 Initializing DMA controller, performing keyboard controller BAT test, starting memory refresh and entering 4GB flat mode next. D3 Starting memory sizing next. D4 Returning to real mode.
CBI/CGI Technical Reference PORT 80 CODES (CONTINUED) Code Description FC Erasing flash ROM next. FD Programming flash ROM next. FF Flash ROM programming successful. Restarting system BIOS next. Runtime code is uncompressed in F000 shadow RAM. Chassis Plans 03 NMI is disabled. Checking for soft reset/power-on next. 05 BIOS stack has been built. Disabling cache memory next. 06 Uncompressing POST code next. 07 Initializing CPU and CPU data area next.
CBI/CGI Technical Reference PORT 80 CODES (CONTINUED) Code Description 24 Configuration required before interrupt vector initialization complete. Interrupt vector initialization about to begin. 25 Interrupt vector initialization done. Clearing password if POST diagnostic switch is on. 27 Any initialization before setting video mode to be done next. 28 Initialization before setting video is complete. Configuring monochrome mode and color mode settings next.
CBI/CGI Technical Reference PORT 80 CODES (CONTINUED) Chassis Plans Code Description 44 interrupts enabled (if diagnostics switch is on). Initializing data to check memory wraparound at 0:0 next. 45 Data initialized. Checking for memory wraparound at 0:0 and finding total system memory size next. 46 Memory wraparound test done. Memory size calculation done. Writing patterns to test memory next. 47 Memory pattern written to extended memory. Writing patterns to base 640KB memory next.
CBI/CGI Technical Reference PORT 80 CODES (CONTINUED) A-10 Code Description 60 DMA page register test passed. Performing DMA controller 1 base register test next. 62 DMA controller 1 base register test passed. Performing DMA controller 2 base register test next. 65 DMA controller 2 base register test passed. Programming DMA controllers 1 and 2 next. 66 Completed programming DMA controllers 1 and 2. Initializing 8259 interrupt controller next.
CBI/CGI Technical Reference PORT 80 CODES (CONTINUED) Chassis Plans Code Description 96 Initializing before passing control to adapter ROM at C800. 97 Initialization before C800 adapter ROM gains control completed. Adapter ROM check next. 98 Adapter ROM had control and has returned control to BIOS POST. Performing any required processing after option ROM returned control. 99 Any initialization required after option ROM test has completed. Configuring timer data area and printer base address next.
CBI/CGI Technical Reference PORT 80 CODES (CONTINUED) ADDITIONAL BUS CHECKPOINTS The System BIOS passes control to the different buses at the following checkpoints to do various tasks: Code Description 2A Initializing different bus system, static and output devices, if present. 38 Initializing bus input, IPL and general devices, if present. 39 Displaying bus initialization error message, if any. 95 Initializing bus adapter ROMs from C8000H through D8000H.
CBI/CGI Technical Reference Appendix B Adaptec, Inc. Software License CAREFULLY READ THE FOLLOWING TERMS AND CONDITIONS. BY USING ANY FILES FROM ADAPTEC, YOU AGREE TO BE BOUND BY THESE TERMS AND CONDITIONS. IF YOU DO NOT AGREE TO THESE TERMS AND CONDITIONS, PROMPTLY RETURN THE SOFTWARE AND ALL ACCOMPANYING ITEMS. This License grants you a non-exclusive license to use the Adaptec Software and related documentation ("Software") on the following terms and conditions: 1.
CBI/CGI Technical Reference 7. EXPORT: By using this Software, you acknowledge that the laws and regulations of the United States restrict the export and re-export of the Software. Further, you agree that you will not export or re-export the Software or media in any form without the appropriate United States and foreign government approval. 8. U.S.
CBI/CGI Technical Reference Appendix C SCSISelect Configuration Utility INTRODUCTION This appendix provides operating instructions for the Adaptec SCSISelect Configuration Utility, which allows you to view and change the configuration settings for the Adaptec SCSI adapter supplied on your single board computer (SBC). It also allows you to list the SCSI IDs of devices on the host adapter, format SCSI disk drives, and check drives for defects.
CBI/CGI Technical Reference If you have made changes to the adapter settings, the following message displays: Save Changes Made? Yes No If you do not want to save your changes, select No to exit from the utility. If you made changes to the adapter settings, select Yes to save your changes. The following message displays: Please press any key to reboot Press any key to reboot the computer. Any changes you made in SCSISelect take effect after the computer reboots.
CBI/CGI Technical Reference OPTIONS MENU When you invoke the SCSISelect Configuration Utility, a screen similar to the following displays: Adaptec AIC7880 Ultra/Ultra W < SCSISelect(TM) > Utility vX.XX AIC-7880 Ultra/Ultra W at Bus:Device XX:XXh Would you like to configure the host adapter, or run the SCSI disk utilities? Select the option and press . Press to switch between color and monochrome modes.
CBI/CGI Technical Reference CONFIGURE/VIEW HOST ADAPTER SETTINGS The Configure/View Host Adapter option displays the current settings for the SCSI bus interface and allows you to change these settings. When you select this option from the Options Menu, a screen similar to the following displays: Adaptec AIC7880 Ultra/Ultra W < SCSISelect(TM) > Utility vX.XX AIC-7880 Ultra/Ultra W at Bus:Device XX:XXh Configuration SCSI Bus Interface Definitions Host Adapter SCSI ID...................
CBI/CGI Technical Reference priority and SCSI ID 0 has the lowest priority. For 16-bit devices, the priority of IDs is 7 through 0, then 15 through 8,with SCSI ID 7 having the highest priority and SCSI ID 8 having the lowest priority. All adapters (8-bit and 16-bit) have a default SCSI ID of 7, which gives the host adapter the highest priority on the SCSI bus.
CBI/CGI Technical Reference Description Termination Adapter is at end of SCSI bus; bus has only 8-bit devices or only 16-bit devices Low ON/High ON (default) Adapter is at end of SCSI bus; bus has both 8-bit and 16-bit devices. Last device must be 16-bit and be terminated. Low ON/High ON Adapter is not at end of SCSI bus; bus has only 16-bit devices. Low OFF/High OFF Adapter is not at end of SCSI bus; bus has both 8-bit and 16-bit devices.
CBI/CGI Technical Reference BOOT DEVICE OPTIONS The Boot Device Configuration screen displays the current settings for the boot device and allows you to change these settings. When you select Boot Device Options from the Configure/View Host Adapter Settings screen, a screen similar to the following displays: Adaptec AIC7880 Ultra/Ultra W < SCSISelect(TM) > Utility vX.XX AIC-7880 Ultra/Ultra W at Bus:Device XX:XXh Boot Device Configuration Run SCSI Disk Utilities to get devices in your system.
CBI/CGI Technical Reference SCSI DEVICE CONFIGURATION The SCSI Device Configuration screen displays the current settings for each SCSI ID and allows you to change these settings. When you select this option from the Configure/View Host Adapter Settings menu, a screen similar to the following displays: Adaptec AIC7880 Ultra/Ultra W < SCSISelect(TM) > Utility vX.XX SCSI Device ID #0 #1 #2 #3 #4 #5 #6 Initiate Sync Negotiation.. yes yes yes yes yes yes yes Maximum Sync Transfer Rate. 20.0 20.0 20.
CBI/CGI Technical Reference The Initiate Sync Negotiation setting determines whether the adapter initiates synchronous negotiation with the SCSI device. If this option is set to the default setting of Yes, the adapter initiates synchronous negotiation with the SCSI device. Normally, you should leave this option set to Yes, because most SCSI devices support synchronous negotiation, which allows for faster data transfer.
CBI/CGI Technical Reference adapter to perform other operations on the SCSI bus while the SCSI device is temporarily disconnected. When the Enable Disconnection option is set to the default setting of Yes, the SCSI device may disconnect from the SCSI bus. The SCSI device may choose not to disconnect, however, even if permitted by the adapter (this can usually be configured on the SCSI device). When this option is set to No, the SCSI device cannot disconnect from the SCSI bus.
CBI/CGI Technical Reference Available options are: Yes No Include in BIOS Scan This option indicates whether or not the specified SCSI device should be included in a scan of the devices which is done during bootup. Setting this option to No for devices which are not attached saves time during bootup since the BIOS will not spend time checking for unassigned devices.
CBI/CGI Technical Reference ADVANCED CONFIGURATION OPTIONS When you select Advanced Configuration Options from the Configure/View Host Adapter Settings Menu, the following screen displays: Adaptec AIC7880 Ultra/Ultra W < SCSISelect(TM) > Utility vX.XX AIC-7880 Ultra/Ultra W at Bus:Device XX:XXh Advanced Configuration Options Plug and Play Scam Support.............................. Disabled Reset SCSI Bus at IC Initialization.....................
CBI/CGI Technical Reference Reset SCSI Bus at IC Initialization The default for this option is Enabled. When the Plug and Play Scam Support option is set to Enabled, you cannot change this option to Disabled. Available options are: Enabled Disabled Host Adapter BIOS This option enables or disables the AIC-7880 BIOS. The BIOS must be enabled if you want the computer to boot from a SCSI hard disk drive connected to the adapter.
CBI/CGI Technical Reference Available options are: • Boot Only - Only the removable-media drive designated as the boot device is treated as a hard disk drive. This is the default option. • All Disks - All removable-media drives supported by the AIC-7880 BIOS are treated as hard drives. This setting has no effect on drives under NetWare, because NetWare automatically supports removable-media drives as fixed disks. • Disabled - No removable-media drives running under DOS are treated as hard disk drives.
CBI/CGI Technical Reference Available options are: Enabled Disabled BIOS Support for Bootable CD-ROM To boot from a CD-ROM, this option must be set to Enabled. If you are booting from a hard disk or other device, make sure no bootable CD-ROM is installed, or set this option to Disabled. Available options are: Enabled Disabled BIOS Support for Int 13H Extensions When this option is set to Enabled, the adapter BIOS supports El Torito Int 13H extensions, which are required for bootable CD-ROMs.
CBI/CGI Technical Reference SCSI DISK UTILITIES The SCSI Disk Utilities screen allows you to format or verify a device on the SCSI bus. When you select SCSI Disk Utilities from the Options Menu, SCSISelect scans the SCSI bus for SCSI devices and displays a screen similar to the following: Adaptec AIC7880 Ultra/Ultra W < SCSISelect(TM) > Utility vX.
CBI/CGI Technical Reference SCSI drives are preformatted and need not be formatted again. If a drive is not preformatted, you can use SCSISelect to perform a low-level format on the drive. The formatting is compatible with most SCSI disk drives. _______________________________________________________________________ NOTE: A low-level format destroys all data on the drive. Be sure to back up your data before performing this operation. You cannot abort a low-level format once it starts.
CBI/CGI Technical Reference Two options are available: • Select Yes to continue with the verify procedure and reassign bad blocks. If you choose to perform the verify, SCSISelect notifies you of bad blocks and prompts you to reassign them. You may press at any time to stop the verification process. • Select No to cancel the verify command without performing the verify and return to the SCSI Disk Utilities screen. Copyright 2003 by Trenton Technology Inc. All rights reserved.
Declaration of Conformity APPLICATION OF COUNCIL DIRECTIVE(S) 89/336/EEC Standard(s) to which Conformity is Declared: EN55022: 1994/A2:1997, CLASS A EN50082-2: 1995 Manufacturer: Chassis Plans, LLC 8295 Aero Place, Suite 200 San Diego, CA 92123 USA Telephone: (858) 571-4330 FAX: (858) 571-6146 Type of Equipment: PCI CPU Board Model Name(s): S5721 (Also Known As: CBI/850, CBI/800, CBI/750, CBI/700, CBI/650, CBI/600E, CBI/550E, CBI/500E, CBI/850C, CBI/800C, CBI/766, CBI/733, CBI/700C, CBI/667, CBI/633, C
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